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This PR implements embedded-storage traits for flash.
One major headache with F4 series is dual-bank flash and non-uniform sector sizes, which required quite a bit of code to abstract away. I went through all of the F4 reference manuals and believe that
flash_sectors(...)
function should be correct for all variants. AFAIK, there is no single source about flash layout for all the chips. Moreover, ST lists F429 and F469 with 512 KB of flash as dual-bank, but there is no information about it in the reference manual. I believe this could be an error in the website and only 1 MB chips have dual-bank capabilities.The PAC crate is also missing
DB1M
field for some of the dual-bank capable chips, so for now I hardcoded the bit position inOPTCR
register.The writable
NorFlash
trait was implemented for the largest sector size of 128 KB, becauseembedded-storage
does not intend to supprot non-uniform sectors (see comment). Smaller sectors are erased together in the larger 128 KB group. There was a suggestion to add different types for the smaller sector ranges, but I'm not sure if that is useful?