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rework SPI DMA Rx/Tx: take 2 #616

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1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Add advanced timer dead time insertion example [#585]
- Cleanups [#595]
- Fix comlementary for independent channels [#599] [#603]
- Capability to release and reuse SPI peripheral after using it with DMA.
- I2c dma can now use single DMA channel for TX or RX only [#598]
- `ws2812::prerendered` in example

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22 changes: 16 additions & 6 deletions examples/rtic-spi-slave-dma.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ mod app {
pac::{DMA1, SPI3},
prelude::*,
rcc::RccExt,
spi::{Rx, SpiSlave, Tx},
spi::{RxCoupledSlave, SpiSlave, TxCoupledSlave},
};
use panic_semihosting as _;
use systick_monotonic::*;
Expand All @@ -25,11 +25,21 @@ mod app {

const ARRAY_SIZE: usize = 3;

type TxTransfer =
Transfer<Stream5<DMA1>, 0, Tx<SPI3>, MemoryToPeripheral, &'static mut [u8; ARRAY_SIZE]>;

type RxTransfer =
Transfer<Stream0<DMA1>, 0, Rx<SPI3>, PeripheralToMemory, &'static mut [u8; ARRAY_SIZE]>;
type TxTransfer = Transfer<
Stream5<DMA1>,
0,
TxCoupledSlave<SPI3, false>,
MemoryToPeripheral,
&'static mut [u8; ARRAY_SIZE],
>;

type RxTransfer = Transfer<
Stream0<DMA1>,
0,
RxCoupledSlave<SPI3, false>,
PeripheralToMemory,
&'static mut [u8; ARRAY_SIZE],
>;

#[shared]
struct Shared {
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2 changes: 1 addition & 1 deletion examples/spi-dma.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ const ARRAY_SIZE: usize = 100;
type SpiDma = Transfer<
Stream4<pac::DMA1>,
0,
Tx<pac::SPI2>,
Tx<pac::SPI2, false>,
MemoryToPeripheral,
&'static mut [u8; ARRAY_SIZE],
>;
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192 changes: 133 additions & 59 deletions src/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -783,83 +783,157 @@ impl<SPI: Instance> Inner<SPI> {
}

// Spi DMA
macro_rules! dma {
($Spi:ident, $DmaBuilder:ident, $Tx:ident, $Rx:ident, $TxCoupled:ident, $RxCoupled:ident) => {
impl<SPI: Instance, const BIDI: bool> $Spi<SPI, BIDI, u8> {
pub fn use_dma(self) -> $DmaBuilder<SPI, BIDI> {
$DmaBuilder { spi: self }
}
}

impl<SPI: Instance, const BIDI: bool> Spi<SPI, BIDI, u8> {
pub fn use_dma(self) -> DmaBuilder<SPI> {
DmaBuilder {
spi: self.inner.spi,
pub struct $DmaBuilder<SPI: Instance, const BIDI: bool> {
spi: $Spi<SPI, BIDI>,
}
}
}

impl<SPI: Instance, const BIDI: bool> SpiSlave<SPI, BIDI, u8> {
pub fn use_dma(self) -> DmaBuilder<SPI> {
DmaBuilder {
spi: self.inner.spi,
pub struct $Tx<SPI: Instance, const BIDI: bool> {
spi: $Spi<SPI, BIDI>,
}
}
}

pub struct DmaBuilder<SPI> {
spi: SPI,
}
pub struct $Rx<SPI: Instance, const BIDI: bool> {
spi: $Spi<SPI, BIDI>,
}

pub struct Tx<SPI> {
spi: PhantomData<SPI>,
}
pub struct $TxCoupled<SPI: Instance, const BIDI: bool> {
spi: $Spi<SPI, BIDI>,
}

pub struct Rx<SPI> {
spi: PhantomData<SPI>,
}
pub struct $RxCoupled<SPI: Instance, const BIDI: bool> {
spi: PhantomData<SPI>,
}

impl<SPI: Instance> DmaBuilder<SPI> {
pub fn tx(self) -> Tx<SPI> {
self.spi.cr2.modify(|_, w| w.txdmaen().enabled());
Tx { spi: PhantomData }
}
impl<SPI: Instance, const BIDI: bool> $DmaBuilder<SPI, BIDI> {
pub fn tx(self) -> $Tx<SPI, BIDI> {
self.spi.spi.cr2.modify(|_, w| w.txdmaen().enabled());
$Tx { spi: self.spi }
}

pub fn rx(self) -> Rx<SPI> {
self.spi.cr2.modify(|_, w| w.rxdmaen().enabled());
Rx { spi: PhantomData }
}
pub fn rx(self) -> $Rx<SPI, BIDI> {
self.spi.spi.cr2.modify(|_, w| w.rxdmaen().enabled());
$Rx { spi: self.spi }
}

pub fn txrx(self) -> (Tx<SPI>, Rx<SPI>) {
self.spi.cr2.modify(|_, w| {
w.txdmaen().enabled();
w.rxdmaen().enabled()
});
(Tx { spi: PhantomData }, Rx { spi: PhantomData })
}
}
pub fn txrx(self) -> ($TxCoupled<SPI, BIDI>, $RxCoupled<SPI, BIDI>) {
self.spi.spi.cr2.modify(|_, w| {
w.txdmaen().enabled();
w.rxdmaen().enabled()
});
(
$TxCoupled { spi: self.spi },
$RxCoupled { spi: PhantomData },
)
}
}

unsafe impl<SPI: Instance> PeriAddress for Rx<SPI> {
#[inline(always)]
fn address(&self) -> u32 {
unsafe { &(*SPI::ptr()).dr as *const _ as u32 }
}
impl<SPI: Instance, const BIDI: bool> $Tx<SPI, BIDI> {
pub fn release(self) -> $Spi<SPI, BIDI, u8> {
self.spi.spi.cr2.modify(|_, w| w.txdmaen().disabled());
self.spi
}
}

type MemSize = u8;
}
impl<SPI: Instance, const BIDI: bool> $Rx<SPI, BIDI> {
pub fn release(self) -> $Spi<SPI, BIDI, u8> {
self.spi.spi.cr2.modify(|_, w| w.rxdmaen().disabled());
self.spi
}
}

unsafe impl<SPI, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, PeripheralToMemory> for Rx<SPI> where
SPI: DMASet<STREAM, CHANNEL, PeripheralToMemory>
{
}
impl<SPI: Instance, const BIDI: bool> $TxCoupled<SPI, BIDI> {
pub fn release(self, _couple: RxCoupled<SPI, BIDI>) -> $Spi<SPI, BIDI, u8> {
self.spi.spi.cr2.modify(|_, w| {
w.rxdmaen().disabled();
w.txdmaen().disabled()
});
self.spi
}
}

unsafe impl<SPI: Instance> PeriAddress for Tx<SPI> {
#[inline(always)]
fn address(&self) -> u32 {
unsafe { &(*SPI::ptr()).dr as *const _ as u32 }
}
unsafe impl<SPI: Instance, const BIDI: bool> PeriAddress for $Rx<SPI, BIDI> {
#[inline(always)]
fn address(&self) -> u32 {
unsafe { &(*SPI::ptr()).dr as *const _ as u32 }
}

type MemSize = u8;
}
type MemSize = u8;
}

unsafe impl<SPI, STREAM, const CHANNEL: u8> DMASet<STREAM, CHANNEL, MemoryToPeripheral> for Tx<SPI> where
SPI: DMASet<STREAM, CHANNEL, MemoryToPeripheral>
{
unsafe impl<SPI: Instance, const BIDI: bool, STREAM, const CHANNEL: u8>
DMASet<STREAM, CHANNEL, PeripheralToMemory> for $Rx<SPI, BIDI>
where
SPI: DMASet<STREAM, CHANNEL, PeripheralToMemory>,
{
}

unsafe impl<SPI: Instance, const BIDI: bool> PeriAddress for $Tx<SPI, BIDI> {
#[inline(always)]
fn address(&self) -> u32 {
unsafe { &(*SPI::ptr()).dr as *const _ as u32 }
}

type MemSize = u8;
}

unsafe impl<SPI: Instance, const BIDI: bool, STREAM, const CHANNEL: u8>
DMASet<STREAM, CHANNEL, MemoryToPeripheral> for $Tx<SPI, BIDI>
where
SPI: DMASet<STREAM, CHANNEL, MemoryToPeripheral>,
{
}

unsafe impl<SPI: Instance, const BIDI: bool> PeriAddress for $RxCoupled<SPI, BIDI> {
#[inline(always)]
fn address(&self) -> u32 {
unsafe { &(*SPI::ptr()).dr as *const _ as u32 }
}

type MemSize = u8;
}

unsafe impl<SPI: Instance, const BIDI: bool, STREAM, const CHANNEL: u8>
DMASet<STREAM, CHANNEL, PeripheralToMemory> for $RxCoupled<SPI, BIDI>
where
SPI: DMASet<STREAM, CHANNEL, PeripheralToMemory>,
{
}

unsafe impl<SPI: Instance, const BIDI: bool> PeriAddress for $TxCoupled<SPI, BIDI> {
#[inline(always)]
fn address(&self) -> u32 {
unsafe { &(*SPI::ptr()).dr as *const _ as u32 }
}

type MemSize = u8;
}

unsafe impl<SPI: Instance, const BIDI: bool, STREAM, const CHANNEL: u8>
DMASet<STREAM, CHANNEL, MemoryToPeripheral> for $TxCoupled<SPI, BIDI>
where
SPI: DMASet<STREAM, CHANNEL, MemoryToPeripheral>,
{
}
};
}

dma!(Spi, DmaBuilder, Tx, Rx, TxCoupled, RxCoupled);
dma!(
SpiSlave,
DmaBuilderSlave,
TxSlave,
RxSlave,
TxCoupledSlave,
RxCoupledSlave
);

impl<SPI: Instance, const BIDI: bool, W: FrameSize> Spi<SPI, BIDI, W> {
pub fn read_nonblocking(&mut self) -> nb::Result<W, Error> {
if BIDI {
Expand Down