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Merged
merged 5 commits into from
Aug 6, 2020
Merged

Update STM32H7 HAL and CMSIS drivers #1140

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9dec9f6
[H7] Update STM32H7xx HAL Drivers to v1.9.0
fpistm Aug 4, 2020
7e2bb73
[H7] Update STM32H7xx CMSIS Drivers to v1.9.0
fpistm Aug 4, 2020
9ca09cf
[H7] Update wrapped files
fpistm Aug 4, 2020
46ba1c6
[H7] Update HAL default configuration
fpistm Aug 6, 2020
df3b533
[H7] Update CMSIS Cortex-Mx Device Peripheral Access Layer System Sou…
fpistm Aug 6, 2020
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3 changes: 3 additions & 0 deletions cores/arduino/stm32/LL/stm32yyxx_ll_cordic.h
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Original file line number Diff line number Diff line change
Expand Up @@ -8,5 +8,8 @@
#ifdef STM32G4xx
#include "stm32g4xx_ll_cordic.h"
#endif
#ifdef STM32H7xx
#include "stm32h7xx_ll_cordic.h"
#endif
#pragma GCC diagnostic pop
#endif /* _STM32YYXX_LL_CORDIC_H_ */
3 changes: 3 additions & 0 deletions cores/arduino/stm32/LL/stm32yyxx_ll_fmac.h
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Expand Up @@ -8,5 +8,8 @@
#ifdef STM32G4xx
#include "stm32g4xx_ll_fmac.h"
#endif
#ifdef STM32H7xx
#include "stm32h7xx_ll_fmac.h"
#endif
#pragma GCC diagnostic pop
#endif /* _STM32YYXX_LL_FMAC_H_ */
12 changes: 12 additions & 0 deletions cores/arduino/stm32/stm32_def_build.h
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Expand Up @@ -204,6 +204,18 @@
#define CMSIS_STARTUP_FILE "startup_stm32g4a1xx.s"
#elif defined(STM32GBK1CB)
#define CMSIS_STARTUP_FILE "startup_stm32gbk1cb.s"
#elif defined(STM32H723xx)
#define CMSIS_STARTUP_FILE "startup_stm32h723xx.s"
#elif defined(STM32H725xx)
#define CMSIS_STARTUP_FILE "startup_stm32h725xx.s"
#elif defined(STM32H730xx)
#define CMSIS_STARTUP_FILE "startup_stm32h730xx.s"
#elif defined(STM32H730xxQ)
#define CMSIS_STARTUP_FILE "startup_stm32h730xxq.s"
#elif defined(STM32H733xx)
#define CMSIS_STARTUP_FILE "startup_stm32h733xx.s"
#elif defined(STM32H735xx)
#define CMSIS_STARTUP_FILE "startup_stm32h735xx.s"
#elif defined(STM32H742xx)
#define CMSIS_STARTUP_FILE "startup_stm32h742xx.s"
#elif defined(STM32H743xx)
Expand Down
3 changes: 3 additions & 0 deletions libraries/SrcWrapper/src/HAL/stm32yyxx_hal_cordic.c
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@@ -1,3 +1,6 @@
#ifdef STM32G4xx
#include "stm32g4xx_hal_cordic.c"
#endif
#ifdef STM32H7xx
#include "stm32h7xx_hal_cordic.c"
#endif
3 changes: 3 additions & 0 deletions libraries/SrcWrapper/src/HAL/stm32yyxx_hal_fmac.c
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@@ -1,3 +1,6 @@
#ifdef STM32G4xx
#include "stm32g4xx_hal_fmac.c"
#endif
#ifdef STM32H7xx
#include "stm32h7xx_hal_fmac.c"
#endif
3 changes: 3 additions & 0 deletions libraries/SrcWrapper/src/LL/stm32yyxx_ll_cordic.c
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@@ -1,3 +1,6 @@
#ifdef STM32G4xx
#include "stm32g4xx_ll_cordic.c"
#endif
#ifdef STM32H7xx
#include "stm32h7xx_ll_cordic.c"
#endif
3 changes: 3 additions & 0 deletions libraries/SrcWrapper/src/LL/stm32yyxx_ll_fmac.c
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@@ -1,3 +1,6 @@
#ifdef STM32G4xx
#include "stm32g4xx_ll_fmac.c"
#endif
#ifdef STM32H7xx
#include "stm32h7xx_ll_fmac.c"
#endif
24,126 changes: 24,126 additions & 0 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h
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24,138 changes: 24,138 additions & 0 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h725xx.h
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24,617 changes: 24,617 additions & 0 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h730xx.h
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24,629 changes: 24,629 additions & 0 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h730xxq.h
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24,617 changes: 24,617 additions & 0 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h733xx.h
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24,629 changes: 24,629 additions & 0 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h735xx.h
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11 changes: 5 additions & 6 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h742xx.h
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Expand Up @@ -3991,7 +3991,7 @@ typedef struct

/***************** Bit definition for FDCAN_ECR register *********************/
#define FDCAN_ECR_TEC_Pos (0U)
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
#define FDCAN_ECR_REC_Pos (8U)
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
Expand Down Expand Up @@ -24984,14 +24984,16 @@ typedef struct
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))
/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/****************************** SMBUS Instances *******************************/
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))

/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand All @@ -25008,9 +25010,6 @@ typedef struct
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
((_INSTANCE_) == SDMMC2))

/******************************** SMBUS Instances *****************************/
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand Down
11 changes: 5 additions & 6 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h743xx.h
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Expand Up @@ -4086,7 +4086,7 @@ typedef struct

/***************** Bit definition for FDCAN_ECR register *********************/
#define FDCAN_ECR_TEC_Pos (0U)
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
#define FDCAN_ECR_REC_Pos (8U)
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
Expand Down Expand Up @@ -25632,14 +25632,16 @@ typedef struct
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))
/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/****************************** SMBUS Instances *******************************/
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))

/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand All @@ -25658,9 +25660,6 @@ typedef struct
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
((_INSTANCE_) == SDMMC2))

/******************************** SMBUS Instances *****************************/
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand Down
11 changes: 5 additions & 6 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h745xx.h
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Expand Up @@ -4189,7 +4189,7 @@ typedef struct

/***************** Bit definition for FDCAN_ECR register *********************/
#define FDCAN_ECR_TEC_Pos (0U)
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
#define FDCAN_ECR_REC_Pos (8U)
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
Expand Down Expand Up @@ -26404,14 +26404,16 @@ typedef struct
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))
/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/****************************** SMBUS Instances *******************************/
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))

/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand All @@ -26430,9 +26432,6 @@ typedef struct
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
((_INSTANCE_) == SDMMC2))

/******************************** SMBUS Instances *****************************/
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand Down
11 changes: 5 additions & 6 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h747xx.h
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Expand Up @@ -4272,7 +4272,7 @@ typedef struct

/***************** Bit definition for FDCAN_ECR register *********************/
#define FDCAN_ECR_TEC_Pos (0U)
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
#define FDCAN_ECR_REC_Pos (8U)
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
Expand Down Expand Up @@ -29577,14 +29577,16 @@ typedef struct
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))
/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/****************************** SMBUS Instances *******************************/
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))

/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand All @@ -29603,9 +29605,6 @@ typedef struct
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
((_INSTANCE_) == SDMMC2))

/******************************** SMBUS Instances *****************************/
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand Down
11 changes: 5 additions & 6 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h750xx.h
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Expand Up @@ -4162,7 +4162,7 @@ typedef struct

/***************** Bit definition for FDCAN_ECR register *********************/
#define FDCAN_ECR_TEC_Pos (0U)
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
#define FDCAN_ECR_REC_Pos (8U)
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
Expand Down Expand Up @@ -25918,14 +25918,16 @@ typedef struct
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))
/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/****************************** SMBUS Instances *******************************/
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))

/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand All @@ -25944,9 +25946,6 @@ typedef struct
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
((_INSTANCE_) == SDMMC2))

/******************************** SMBUS Instances *****************************/
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand Down
11 changes: 5 additions & 6 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h753xx.h
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Expand Up @@ -4162,7 +4162,7 @@ typedef struct

/***************** Bit definition for FDCAN_ECR register *********************/
#define FDCAN_ECR_TEC_Pos (0U)
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
#define FDCAN_ECR_REC_Pos (8U)
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
Expand Down Expand Up @@ -25919,14 +25919,16 @@ typedef struct
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))
/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/****************************** SMBUS Instances *******************************/
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))

/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand All @@ -25945,9 +25947,6 @@ typedef struct
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
((_INSTANCE_) == SDMMC2))

/******************************** SMBUS Instances *****************************/
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand Down
11 changes: 5 additions & 6 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h755xx.h
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Expand Up @@ -4265,7 +4265,7 @@ typedef struct

/***************** Bit definition for FDCAN_ECR register *********************/
#define FDCAN_ECR_TEC_Pos (0U)
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
#define FDCAN_ECR_REC_Pos (8U)
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
Expand Down Expand Up @@ -26691,14 +26691,16 @@ typedef struct
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))
/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/****************************** SMBUS Instances *******************************/
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))

/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand All @@ -26717,9 +26719,6 @@ typedef struct
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
((_INSTANCE_) == SDMMC2))

/******************************** SMBUS Instances *****************************/
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand Down
11 changes: 5 additions & 6 deletions system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h757xx.h
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Expand Up @@ -4348,7 +4348,7 @@ typedef struct

/***************** Bit definition for FDCAN_ECR register *********************/
#define FDCAN_ECR_TEC_Pos (0U)
#define FDCAN_ECR_TEC_Msk (0xFUL << FDCAN_ECR_TEC_Pos) /*!< 0x0000000F */
#define FDCAN_ECR_TEC_Msk (0xFFUL << FDCAN_ECR_TEC_Pos) /*!< 0x000000FF */
#define FDCAN_ECR_TEC FDCAN_ECR_TEC_Msk /*!<Transmit Error Counter */
#define FDCAN_ECR_REC_Pos (8U)
#define FDCAN_ECR_REC_Msk (0x7FUL << FDCAN_ECR_REC_Pos) /*!< 0x00007F00 */
Expand Down Expand Up @@ -29864,14 +29864,16 @@ typedef struct
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))
/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/****************************** SMBUS Instances *******************************/
#define IS_SMBUS_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3) || \
((INSTANCE) == I2C4))

/************** I2C Instances : wakeup capability from stop modes *************/
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) IS_I2C_ALL_INSTANCE(INSTANCE)

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand All @@ -29890,9 +29892,6 @@ typedef struct
#define IS_SDMMC_ALL_INSTANCE(_INSTANCE_) (((_INSTANCE_) == SDMMC1) || \
((_INSTANCE_) == SDMMC2))

/******************************** SMBUS Instances *****************************/
#define IS_SMBUS_INSTANCE(INSTANCE) ((INSTANCE) == I2C1)

/******************************** SPI Instances *******************************/
#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
Expand Down
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