Add STM32 C0 support #1926
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Add STM32 C0 support #1926
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Included in STM32CubeC0 FW 1.0.1 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Included in STM32CubeC0 FW 1.0.1 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Allow some redefinition. Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Remove duplicate clock definition. Allow VECT_TAB_OFFSET redefinition. Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Note: SystemClock_Config() is based on LL to spare a maximum memory Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
…series C0 doesn't have ability to enable/disable Backup Domain write protection Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
C0 doesn't have PLL Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
C0 doesn't have RCC_USART1CLKSOURCE_HSI but instead RCC_USART1CLKSOURCE_HSIKER Note: both HSI and HSIKER have the same HSI48 base, but each have a dedicated prescaler. This apply to UART1 and I2C1 Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
fpistm
added
enhancement
Note: SystemClock_Config() is based on LL API to spare Flash memory Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
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This PR add the STM32 C0 support based on STM32CubeC0 v1.0.1.
This also add the support of:
Tests: