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Add variant: Generic H563RGT, H563RIT, H573RIT #2424

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2 changes: 2 additions & 0 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -542,8 +542,10 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :----: | :-------: | ---- | :-----: | :---- |
| :green_heart: | STM32H503RB | Generic Board | *2.7.0* | |
| :green_heart: | STM32H563IIKxQ | Generic Board | *2.6.0* | |
| :yellow_heart: | STM32H563RG<br>STM32H563RI | Generic Board | *2.9.0* | |
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| :green_heart: | STM32H563ZG<br>STM32H563ZI | Generic Board | *2.6.0* | |
| :green_heart: | STM32H573IIKxQ | Generic Board | *2.6.0* | |
| :yellow_heart: | STM32H573RI | Generic Board | *2.9.0* | |
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| :green_heart: | STM32H573ZI | Generic Board | *2.6.0* | |

### Generic STM32H7 boards
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27 changes: 27 additions & 0 deletions boards.txt
Original file line number Diff line number Diff line change
Expand Up @@ -8423,6 +8423,24 @@ GenH5.menu.pnum.GENERIC_H563IIKXQ.build.product_line=STM32H563xx
GenH5.menu.pnum.GENERIC_H563IIKXQ.build.variant=STM32H5xx/H563IIKxQ_H573IIKxQ
GenH5.menu.pnum.GENERIC_H563IIKXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd

# Generic H563RGTx
GenH5.menu.pnum.GENERIC_H563RGTX=Generic H563RGTx
GenH5.menu.pnum.GENERIC_H563RGTX.upload.maximum_size=1048576
GenH5.menu.pnum.GENERIC_H563RGTX.upload.maximum_data_size=655360
GenH5.menu.pnum.GENERIC_H563RGTX.build.board=GENERIC_H563RGTX
GenH5.menu.pnum.GENERIC_H563RGTX.build.product_line=STM32H563xx
GenH5.menu.pnum.GENERIC_H563RGTX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT
GenH5.menu.pnum.GENERIC_H563RGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd

# Generic H563RITx
GenH5.menu.pnum.GENERIC_H563RITX=Generic H563RITx
GenH5.menu.pnum.GENERIC_H563RITX.upload.maximum_size=2097152
GenH5.menu.pnum.GENERIC_H563RITX.upload.maximum_data_size=655360
GenH5.menu.pnum.GENERIC_H563RITX.build.board=GENERIC_H563RITX
GenH5.menu.pnum.GENERIC_H563RITX.build.product_line=STM32H563xx
GenH5.menu.pnum.GENERIC_H563RITX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT
GenH5.menu.pnum.GENERIC_H563RITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd

# Generic H563ZGTx
GenH5.menu.pnum.GENERIC_H563ZGTX=Generic H563ZGTx
GenH5.menu.pnum.GENERIC_H563ZGTX.upload.maximum_size=1048576
Expand Down Expand Up @@ -8450,6 +8468,15 @@ GenH5.menu.pnum.GENERIC_H573IIKXQ.build.product_line=STM32H573xx
GenH5.menu.pnum.GENERIC_H573IIKXQ.build.variant=STM32H5xx/H563IIKxQ_H573IIKxQ
GenH5.menu.pnum.GENERIC_H573IIKXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H573.svd

# Generic H573RITx
GenH5.menu.pnum.GENERIC_H573RITX=Generic H573RITx
GenH5.menu.pnum.GENERIC_H573RITX.upload.maximum_size=2097152
GenH5.menu.pnum.GENERIC_H573RITX.upload.maximum_data_size=655360
GenH5.menu.pnum.GENERIC_H573RITX.build.board=GENERIC_H573RITX
GenH5.menu.pnum.GENERIC_H573RITX.build.product_line=STM32H573xx
GenH5.menu.pnum.GENERIC_H573RITX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT
GenH5.menu.pnum.GENERIC_H573RITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H573.svd

# Generic H573ZITx
GenH5.menu.pnum.GENERIC_H573ZITX=Generic H573ZITx
GenH5.menu.pnum.GENERIC_H573ZITX.upload.maximum_size=2097152
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46 changes: 44 additions & 2 deletions variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c
Original file line number Diff line number Diff line change
Expand Up @@ -21,8 +21,50 @@
*/
WEAK void SystemClock_Config(void)
{
/* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};

/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);

while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_CSI;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
RCC_OscInitStruct.PLL.PLLM = 1;
RCC_OscInitStruct.PLL.PLLN = 125;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
RCC_OscInitStruct.PLL.PLLFRACN = 0;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}

/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
| RCC_CLOCKTYPE_PCLK3;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
Error_Handler();
}
}

#endif /* ARDUINO_GENERIC_* */
187 changes: 187 additions & 0 deletions variants/STM32H5xx/H563R(G-I)T_H573RIT/ldscript.ld
Original file line number Diff line number Diff line change
@@ -0,0 +1,187 @@
/*
******************************************************************************
**
** @file : LinkerScript.ld
**
** @author : Auto-generated by STM32CubeIDE
**
** @brief : Linker script for STM32H573RITx Device from STM32H5 series
** 2048KBytes FLASH
** 640KBytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed as is, without any warranty
** of any kind.
**
******************************************************************************
** @attention
**
** Copyright (c) 2024 STMicroelectronics.
** All rights reserved.
**
** This software is licensed under terms that can be found in the LICENSE file
** in the root directory of this software component.
** If no LICENSE file comes with this software, it is provided AS-IS.
**
******************************************************************************
*/

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */

_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
}

/* Sections */
SECTIONS
{
/* The startup code into "FLASH" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH

/* The program code and other data into "FLASH" Rom type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)

KEEP (*(.init))
KEEP (*(.fini))

. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH

/* Constant data into "FLASH" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH

.ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH

.ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >FLASH

.preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH

.init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH

.fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >FLASH

/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);

/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */

. = ALIGN(4);
_edata = .; /* define a global symbol at data end */

} >RAM AT> FLASH

/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)

. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM

/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM

/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}

.ARM.attributes 0 : { *(.ARM.attributes) }
}
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