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inouts cannot be bound using a bit-select syntax #258

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sylefeb opened this issue Dec 30, 2023 · 0 comments

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sylefeb commented Dec 30, 2023

See #108 (comment)

This limitation is painful and needs fixing. Current workarounds are:

breakout individual bits, e.g.

Silice/projects/spiflash/spiflash2x.si

Line 75 in 8842f22

sb_io_inout sb_io0(clock <: clock, oe <: io_oe[0,1], in :> io_i[0,1], out <: io_o[0,1], pin <:> io0);
define a Verilog module to help, as in the SDRAM controller:

Silice/projects/common/sdram_controller_autoprecharge_pipelined_r512_w64.si

Line 109 in 8842f22

inout16_ff_ulx3s ioset(

and the corresponding Verilog module

Silice/projects/common/inout16_ff_ulx3s.v

Line 1 in 8842f22

module inout16_ff_ulx3s(

sylefeb added the enhancement label

sylefeb self-assigned this

sylefeb mentioned this issue

General code issues thread #108

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sylefeb added a commit that referenced this issue


          allowing partial binding of inouts, (#108, #258)

eededd2

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