Merge pull request #304 from qwe661234/arm64_t1_jit

Introduce a tier-1 JIT compiler based on Aarch64 architecture

.github/workflows/main.yml

@@ -58,6 +58,7 @@ jobs:
         run: |
           make
           make check
+          make ENABLE_JIT=1 clean check
 
   coding-style:
     runs-on: ubuntu-22.04

.gitignore

@@ -21,4 +21,4 @@ build/path/
 tests/**/*.elf
 tests/arch-test-target/config.ini
 __pycache__/
-src/rv32_jit_template.c
+src/rv32_jit.c

Makefile

@@ -121,15 +121,15 @@ endif
 ENABLE_JIT ?= 0
 $(call set-feature, JIT)
 ifeq ($(call has, JIT), 1)
-OBJS_EXT += jit_x64.o 
-ifneq ($(processor), x86_64)
-$(error JIT mode only supports for x64 target currently.)
+OBJS_EXT += jit.o 
+ifneq ($(processor),$(filter $(processor),x86_64 aarch64 arm64))
+$(error JIT mode only supports for x64 and arm64 target currently.)
 endif
 
-src/rv32_jit_template.c:
+src/rv32_jit.c:
 	$(Q)tools/gen-jit-template.py $(CFLAGS) > $@
 
-$(OUT)/jit_x64.o: src/jit_x64.c src/rv32_jit_template.c
+$(OUT)/jit.o: src/jit.c src/rv32_jit.c
 	$(VECHO) "  CC\t$@\n"
 	$(Q)$(CC) -o $@ $(CFLAGS) -c -MMD -MF $@.d $<
 endif
@@ -235,7 +235,7 @@ endif
 endif
 
 clean:
-	$(RM) $(BIN) $(OBJS) $(HIST_BIN) $(HIST_OBJS) $(deps) $(CACHE_OUT) src/rv32_jit_template.c
+	$(RM) $(BIN) $(OBJS) $(HIST_BIN) $(HIST_OBJS) $(deps) $(CACHE_OUT) src/rv32_jit.c
 distclean: clean
 	-$(RM) $(DOOM_DATA) $(QUAKE_DATA)
 	$(RM) -r $(OUT)/id1

README.md

@@ -81,6 +81,7 @@ The image containing all the necessary tools for development and testing can be
 * `ENABLE_Zifencei`: Instruction-Fetch Fence
 * `ENABLE_GDBSTUB` : GDB remote debugging support
 * `ENABLE_SDL` : Experimental Display and Event System Calls
+* `ENABLE_JIT` : Experimental JIT compiler
 
 e.g., run `make ENABLE_EXT_F=0` for the build without floating-point support.
 

src/emulate.c

@@ -27,7 +27,7 @@ extern struct target_ops gdbstub_ops;
 
 #if RV32_HAS(JIT)
 #include "cache.h"
-#include "jit_x64.h"
+#include "jit.h"
 #endif
 
 /* Shortcuts for comparing each field of specified RISC-V instruction */
@@ -1067,7 +1067,7 @@ void rv_step(riscv_t *rv, int32_t cycles)
                    cache_freq(rv->block_cache, block->pc_start) >= 1024) ||
                   cache_hot(rv->block_cache, block->pc_start))) {
             block->hot = true;
-            block->offset = translate_x64(rv, block);
+            block->offset = jit_translate(rv, block);
             ((exec_block_func_t) state->buf)(
                 rv, (uintptr_t) (state->buf + block->offset));
             prev = NULL;