WIP: add feature to use critical-section.

taiki-e · Dec 14, 2022 · c3c1dea · c3c1dea
1 parent a235f16
commit c3c1dea
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Showing 4 changed files with 141 additions and 2 deletions.
diff --git a/Cargo.toml b/Cargo.toml
@@ -61,6 +61,9 @@ std = []
 # - The MSRV when this feature enables depends on the MSRV of serde.
 serde = { version = "1.0.103", optional = true, default-features = false }
 
+# Use `critical-section`.
+critical-section = { version = "1", optional = true }
+
 [dev-dependencies]
 crossbeam-utils = "0.8"
 fastrand = "1"

diff --git a/src/imp/interrupt/mod.rs b/src/imp/interrupt/mod.rs
@@ -31,8 +31,14 @@
 // called while interrupts are disabled, and since the load/store is
 // atomic, it is not affected by interrupts even if interrupts are enabled.
 #[cfg(not(target_arch = "avr"))]
+#[cfg(not(feature = "critical-section"))]
 use arch::atomic;
 
+#[cfg(not(target_arch = "avr"))]
+#[cfg(feature = "critical-section")]
+use core::sync::atomic;
+
+#[cfg(not(feature = "critical-section"))]
 #[cfg_attr(
  all(
  target_arch = "arm",
@@ -59,6 +65,16 @@ use core::{cell::UnsafeCell, sync::atomic::Ordering};
 // provided in a similar way by the Linux kernel to be lock-free.)
 const IS_ALWAYS_LOCK_FREE: bool = true;
 
+#[cfg(feature = "critical-section")]
+#[inline]
+fn with<F, R>(f: F) -> R
+where
+ F: FnOnce() -> R,
+{
+ critical_section::with(|_| f())
+}
+
+#[cfg(not(feature = "critical-section"))]
 #[inline]
 fn with<F, R>(f: F) -> R
 where

diff --git a/src/imp/mod.rs b/src/imp/mod.rs
@@ -5,6 +5,7 @@
 #[cfg(not(any(
  portable_atomic_no_atomic_load_store,
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
  target_arch = "avr",
  target_arch = "msp430",
 )))]
@@ -115,6 +116,7 @@ mod fallback;
 #[cfg(any(
  all(test, target_os = "none"),
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
  target_arch = "avr",
  target_arch = "msp430",
 ))]
@@ -124,6 +126,7 @@ mod fallback;
  cfg(any(test, not(target_has_atomic = "ptr")))
 )]
 #[cfg(any(
+ feature = "critical-section",
  target_arch = "arm",
  target_arch = "avr",
  target_arch = "msp430",
@@ -144,6 +147,7 @@ pub(crate) mod float;
 #[cfg(not(any(
  portable_atomic_no_atomic_load_store,
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
  target_arch = "avr",
  target_arch = "msp430",
 )))]
@@ -168,6 +172,7 @@ pub(crate) use self::riscv::{
 // no core Atomic{Isize,Usize,Bool,Ptr}/Atomic{I,U}{8,16} & assume single core => critical section based fallback
 #[cfg(any(
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
  target_arch = "avr",
  target_arch = "msp430"
 ))]
@@ -181,6 +186,7 @@ pub(crate) use self::interrupt::{
 #[cfg(not(any(
  portable_atomic_no_atomic_load_store,
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
  target_arch = "avr",
  target_arch = "msp430",
 )))]
@@ -193,7 +199,7 @@ pub(crate) use self::interrupt::{
 )]
 pub(crate) use self::core_atomic::{AtomicI32, AtomicU32};
 // RISC-V without A-extension
-#[cfg(not(portable_atomic_unsafe_assume_single_core))]
+#[cfg(not(any(portable_atomic_unsafe_assume_single_core, feature = "critical-section")))]
 #[cfg_attr(portable_atomic_no_cfg_target_has_atomic, cfg(portable_atomic_no_atomic_cas))]
 #[cfg_attr(not(portable_atomic_no_cfg_target_has_atomic), cfg(not(target_has_atomic = "ptr")))]
 #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
@@ -202,6 +208,7 @@ pub(crate) use self::riscv::{AtomicI32, AtomicU32};
 #[cfg(any(not(target_pointer_width = "16"), feature = "fallback"))]
 #[cfg(any(
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
  target_arch = "avr",
  target_arch = "msp430"
 ))]
@@ -213,6 +220,7 @@ pub(crate) use self::interrupt::{AtomicI32, AtomicU32};
 #[cfg(not(any(
  portable_atomic_no_atomic_load_store,
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
 )))]
 #[cfg_attr(portable_atomic_no_cfg_target_has_atomic, cfg(not(portable_atomic_no_atomic_64)))]
 #[cfg_attr(
@@ -230,7 +238,7 @@ pub(crate) use self::interrupt::{AtomicI32, AtomicU32};
 )]
 pub(crate) use self::core_atomic::{AtomicI64, AtomicU64};
 // RISC-V without A-extension
-#[cfg(not(portable_atomic_unsafe_assume_single_core))]
+#[cfg(not(any(portable_atomic_unsafe_assume_single_core, feature = "critical-section")))]
 #[cfg_attr(portable_atomic_no_cfg_target_has_atomic, cfg(portable_atomic_no_atomic_cas))]
 #[cfg_attr(not(portable_atomic_no_cfg_target_has_atomic), cfg(not(target_has_atomic = "ptr")))]
 #[cfg(target_arch = "riscv64")]
@@ -253,6 +261,7 @@ pub(crate) use self::fallback::{AtomicI64, AtomicU64};
 ))]
 #[cfg(any(
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
  target_arch = "avr",
  target_arch = "msp430"
 ))]
@@ -320,6 +329,7 @@ pub(crate) use self::fallback::{AtomicI128, AtomicU128};
 #[cfg(feature = "fallback")]
 #[cfg(any(
  portable_atomic_unsafe_assume_single_core,
+ feature = "critical-section",
  target_arch = "avr",
  target_arch = "msp430"
 ))]