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Support Xtensa (OpenOCD Semihosting) #9

Merged
merged 1 commit into from
Mar 21, 2024
Merged

Support Xtensa (OpenOCD Semihosting) #9

merged 1 commit into from
Mar 21, 2024

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taiki-e
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@taiki-e taiki-e commented Mar 16, 2024

This supports ARM-semihosting-compatible OpenOCD Semihosting that using break instruction, under the openocd-semihosting feature.

I'm currently thinking there are two blockers to merge this:

  • I have confirmed that this can be built with cargo +esp build --target xtensa-esp32-none-elf -Z build-std=core,alloc --features alloc,stdio,fs,args,time, but as said in Support for Xtensa architecture #8 (comment), I don't have the environment to test this. We need to have someone check that this works before we merge it.
  • If the eventual direction in upstream is that to obsolete simcall-based semihosting, I think this PR is fine as is, but if not, it would be safer to add a feature flag and enable the implementation only when it is enabled, rather than unconditionally enabling this implementation.

cc @SergioGasquez

Closes #8

@SergioGasquez
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Thanks for the PR. Just created probe-rs/probe-rs#2301, once that this issue is solved we will have a way to test this PR. If you have any suggestion on how to test this Pr alone, just let me know!

@SergioGasquez SergioGasquez mentioned this pull request Mar 18, 2024
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@taiki-e taiki-e force-pushed the xtensa2 branch 4 times, most recently from 298473d to c829c19 Compare March 19, 2024 18:40
@SergioGasquez
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I was able to run some tests in an ESP32-S3 (Xtensa)!
I was using my fork of probe-rs that adds Xtensa semihosting support, which already has a PR opened, and the hil-testing branch of esp-hal which patch semihosting to use this PR.

esp-hal/hil-test on  feat/hil-testing [$⇡] is 📦 v0.0.0 via 🦀 v1.76.0 took 24s 
❯ CARGO_BUILD_TARGET=xtensa-esp32s3-none-elf \
                        PROBE_RS_CHIP=esp32s3 \
                        cargo +esp test --features=esp32s3
   Compiling hil-test v0.0.0 (/home/sergio/Documents/Espressif/esp-rs/esp-hal/hil-test)
    Finished test [optimized + debuginfo] target(s) in 0.32s
     Running tests/aes.rs (target/xtensa-esp32s3-none-elf/debug/deps/aes-e42a6c0949a80cab)
      Erasing ✔ [00:00:00] [#####################################################################################################################################################################################] 192.00 KiB/192.00 KiB @ 339.28 KiB/s (eta 0s )
  Programming ✔ [00:00:00] [########################################################################################################################################################################################] 44.24 KiB/44.24 KiB @ 61.27 KiB/s (eta 0s )    Finished in 1.301s

running 2 tests
test tests::test_aes_encryption ... ok
test tests::test_aes_decryption ... ok

test result: ok. 2 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.84s

     Running tests/gpio.rs (target/xtensa-esp32s3-none-elf/debug/deps/gpio-a86526cffe5ff18b)
      Erasing ✔ [00:00:00] [#####################################################################################################################################################################################] 192.00 KiB/192.00 KiB @ 337.06 KiB/s (eta 0s )
  Programming ✔ [00:00:00] [########################################################################################################################################################################################] 43.73 KiB/43.73 KiB @ 61.13 KiB/s (eta 0s )    Finished in 1.298s

running 2 tests
test tests::test_gpio_input  ... ok
test tests::test_gpio_output ... ok

test result: ok. 2 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.84s

     Running tests/spi_full_duplex.rs (target/xtensa-esp32s3-none-elf/debug/deps/spi_full_duplex-dd72e0759442db36)
      Erasing ✔ [00:00:00] [#####################################################################################################################################################################################] 192.00 KiB/192.00 KiB @ 339.07 KiB/s (eta 0s )
  Programming ✔ [00:00:00] [########################################################################################################################################################################################] 45.99 KiB/45.99 KiB @ 62.06 KiB/s (eta 0s )    Finished in 1.32s

running 4 tests
test tests::test_symestric_transfer                      ... ok
test tests::test_asymestric_transfer                     ... ok
test tests::test_symestric_transfer_huge_buffer          ... ok
test tests::test_symestric_transfer_huge_buffer_no_alloc ... ok

test result: ok. 4 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 1.68s

     Running tests/uart.rs (target/xtensa-esp32s3-none-elf/debug/deps/uart-d0dabce6c5fe82c1)
      Erasing ✔ [00:00:00] [#####################################################################################################################################################################################] 192.00 KiB/192.00 KiB @ 334.83 KiB/s (eta 0s )
  Programming ✔ [00:00:00] [########################################################################################################################################################################################] 44.09 KiB/44.09 KiB @ 61.29 KiB/s (eta 0s )    Finished in 1.306s

running 1 test
test tests::test_send_receive ... ok

test result: ok. 1 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.42s


esp-hal/hil-test on  feat/hil-testing [$!⇡] is 📦 v0.0.0 via 🦀 v1.76.0 took 11s 
❯ CARGO_BUILD_TARGET=xtensa-esp32s3-none-elf \
      PROBE_RS_CHIP=esp32s3 \
      cargo +esp test --features=esp32s3
    Finished test [optimized + debuginfo] target(s) in 0.05s
     Running tests/aes.rs (target/xtensa-esp32s3-none-elf/debug/deps/aes-e42a6c0949a80cab)
      Erasing ✔ [00:00:00] [#####################################################################################################################################################################################] 192.00 KiB/192.00 KiB @ 337.54 KiB/s (eta 0s )
  Programming ✔ [00:00:00] [########################################################################################################################################################################################] 44.24 KiB/44.24 KiB @ 61.27 KiB/s (eta 0s )    Finished in 1.304s

running 2 tests
test tests::test_aes_encryption ... ok
test tests::test_aes_decryption ... ok

test result: ok. 2 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.84s

     Running tests/gpio.rs (target/xtensa-esp32s3-none-elf/debug/deps/gpio-a86526cffe5ff18b)
      Erasing ✔ [00:00:00] [#####################################################################################################################################################################################] 192.00 KiB/192.00 KiB @ 341.41 KiB/s (eta 0s )
  Programming ✔ [00:00:00] [########################################################################################################################################################################################] 43.73 KiB/43.73 KiB @ 61.11 KiB/s (eta 0s )    Finished in 1.291s

running 2 tests
test tests::test_gpio_input  ... ok
test tests::test_gpio_output ... ok

test result: ok. 2 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.84s

     Running tests/spi_full_duplex.rs (target/xtensa-esp32s3-none-elf/debug/deps/spi_full_duplex-dd72e0759442db36)
      Erasing ✔ [00:00:00] [#####################################################################################################################################################################################] 192.00 KiB/192.00 KiB @ 339.73 KiB/s (eta 0s )
  Programming ✔ [00:00:00] [########################################################################################################################################################################################] 45.99 KiB/45.99 KiB @ 62.10 KiB/s (eta 0s )    Finished in 1.319s

running 4 tests
test tests::test_symestric_transfer                      ... ok
test tests::test_asymestric_transfer                     ... ok
test tests::test_symestric_transfer_huge_buffer          ... ok
test tests::test_symestric_transfer_huge_buffer_no_alloc ... ok

test result: ok. 4 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 1.69s

     Running tests/uart.rs (target/xtensa-esp32s3-none-elf/debug/deps/uart-d0dabce6c5fe82c1)
      Erasing ✔ [00:00:00] [#####################################################################################################################################################################################] 192.00 KiB/192.00 KiB @ 345.52 KiB/s (eta 0s )
  Programming ✔ [00:00:00] [########################################################################################################################################################################################] 44.09 KiB/44.09 KiB @ 61.22 KiB/s (eta 0s )    Finished in 1.289s

running 1 test
test tests::test_send_receive ... ok

test result: ok. 1 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.42s

@MabezDev
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Thanks for the PR @taiki-e, it's very much appreciated!

If the eventual direction in upstream is that to obsolete simcall-based semihosting, I think this PR is fine as is, but if not, it would be safer to add a feature flag and enable the implementation only when it is enabled, rather than unconditionally enabling this implementation.

I can't rule out other Xtensa players wanting to use the simcall method, so I think the safest method would be to put this behind a feature, which leaves the option of adding a simcall implementation down the line. It may also be beneficial for Espressif, as we do have QEMU support for some of our chips, and QEMU uses the simcall method of semihosting.

@taiki-e
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taiki-e commented Mar 21, 2024

Moved this implementation behind the openocd-semihosting feature.

Document of the feature is:

  • openocd-semihosting
    Xtensa-specific: Use OpenOCD Semihosting.

    Xtensa has two semihosting interfaces:

    • Tensilica ISS SIMCALL used in Cadence tools and QEMU.
    • ARM-semihosting-compatible semihosting interface used in OpenOCD and probe-rs. (This crate calls it "OpenOCD Semihosting", which is the same as the option name in newlib.)

    This crate does not currently support SIMCALL-based semihosting, but users need to explicitly enable the feature to avoid accidentally selecting a different one than one actually want to use.

And here is the error message when using this crate on Xtensa without enabling the openocd-semihosting feature:

error: xtensa has two semihosting interfaces so you have to select implementation;
       please enable `openocd-semihosting` feature if you want to use OpenOCD Semihosting used in OpenOCD, probe-rs, etc.
       see <https://docs.rs/semihosting/latest/semihosting/#optional-features-openocd-semihosting> for more.
   --> src/lib.rs:247:1
    |
247 | / compile_error!(
248 | |     "xtensa has two semihosting interfaces so you have to select implementation;\n\
249 | |     please enable `openocd-semihosting` feature if you want to use OpenOCD Semihosting used in OpenOCD, probe-rs, etc.\n\
250 | |     see <https://docs.rs/semihosting/latest/semihosting/#optional-features-openocd-semihosting> for more."
251 | | );
    | |_^

@taiki-e taiki-e added the O-xtensa Target: Xtensa processors label Mar 21, 2024
@taiki-e taiki-e merged commit 95e0103 into main Mar 21, 2024
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@taiki-e taiki-e deleted the xtensa2 branch March 21, 2024 16:18
@taiki-e taiki-e mentioned this pull request Mar 21, 2024
@taiki-e
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taiki-e commented Mar 21, 2024

Published in 0.1.7.

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