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Should not MMIO region be Uncacheable (not WriteBack)? #31
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It seems fine to use WriteBack EPT settings for MMIO.
The table shows that regardless of the MTRR memory type, which equals to the EPT memory type in our case, always PAT entry value is used for the effective memory type. Hence, setting WriteBack to the EPT memory type should be no problem and the UC memory type should be used for MMIO regions if a guest configured so. |
Based on Intel answer and thorough reading section 2C in SDM, it clearly says that MTRRs are ignored when using EPT. Therefore, blindly setting pages to WB can cause issues with special MMIO regions that do not tolerate WB, and whose data is only in the MTRRs and not PAT. |
I am not sure there is a case where PAT does not exist. My understanding is that as long as a processor supports PAT (all modern processors do), a processor always looks up PTE or PDE and determines PAT. Regardless, blindly setting WB to EPT is problematic as you pointed out. EPT overwrites a memory type via MTRR as denoted in I had misunderstood what the table explained and replied wrong here. Thank you for catching the issue and remind me! I have a fix locally and will apply it after some tests. |
This update fixes a system hang and power callback issues seen on Kaby Lake systems. The root cause was that a memory type set for EPT PTE did not respect MTRR and overwriting UC set in MTRR with WB, which led to WB memory type for MMIO regions. This update is to read and store all MTRRs at initialization, and consult them when EPT entries are built. Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com>
Capturing a question in a thread #29.
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