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Version 6.2.8: TTN3
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platenspeler committed Oct 18, 2021
1 parent 5f5a2fa commit 3b02352
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Showing 8 changed files with 61 additions and 41 deletions.
2 changes: 1 addition & 1 deletion src/ESP-sc-gway.ino
Original file line number Diff line number Diff line change
Expand Up @@ -629,7 +629,7 @@ void setup() {
LoraUp.payLoad[0]= 0;
LoraUp.size = 0; // Init the length to 0

// init interrupt handlers, which are shared for GPIO15 / D8,
// init interrupt handlers, which are shared for GPIO15 == D8,
// we switch on HIGH interrupts
if (pins.dio0 == pins.dio1) {
attachInterrupt(pins.dio0, Interrupt_0, RISING); // Share interrupts
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57 changes: 35 additions & 22 deletions src/_loraModem.ino
Original file line number Diff line number Diff line change
Expand Up @@ -794,7 +794,7 @@ int loraWait(struct LoraDown *LoraDown)
// crc is set to 0x00 for TX
// iiq is set to 0x40 down (or 0x40 up based on ipol value in txpkt)
//
// 1. opmode Lora (only in Sleep mode)
// 1. opmode Lora (only in Sleep mode), set to 0x00
// 2. opmode StandBY
// 3. Configure Modem
// 4. Configure Channel
Expand All @@ -811,74 +811,86 @@ int loraWait(struct LoraDown *LoraDown)
// 15. Wait until the right time to transmit has arrived
// 16. opmode TX, start actual transmission
//
// Transmission to the device not is not done often, but is time critical.
// Transmission to the device is not done often, but is time critical.
// The following registers are set (AN1200.24 para 2.1):
//
// REG_OPMODE = (OPMODE_LORA | 0x03) Transmit
// REG_PARAMP = 0x08 50 uSec
// REG_MODEM_CONFIG1 = 0x72
// REG_MODEM_CONFIG2 = 0x70 Switch CRC off
// REG_MODEM_CONFIG3 = 0x00 (or 0x01 depending on spreading factor >= 11)
// REG_SYNC_WORD = 0x34
//
// ----------------------------------------------------------------------------------------

void txLoraModem(struct LoraDown *LoraDown)
{
_state = S_TX;

// 1. Select LoRa modem from sleep mode
opmode(OPMODE_SLEEP); // set 0x01
//opmode(OPMODE_LORA); // set 0x01 to 0x80
opmode(OPMODE_SLEEP); // set 0x01
delayMicroseconds(100);
opmode(OPMODE_LORA | 0x03);; // set 0x01 to 0x80

// Assert the value of the current mode
ASSERT((readRegister(REG_OPMODE) & OPMODE_LORA) != 0);

// 2. enter standby mode (required for FIFO loading))
opmode(OPMODE_STANDBY); // set 0x01 to 0x01
opmode(OPMODE_STANDBY); // set 0x01 to 0x01

// 3. Init spreading factor and other Modem setting
setRate(LoraDown->sf, LoraDown->crc);

// Frequency hopping
//writeRegister(REG_HOP_PERIOD, (uint8_t) 0x00); // set 0x24 to 0x00 only for receivers
//writeRegister(REG_HOP_PERIOD, (uint8_t) 0x00); // set 0x24 to 0x00 only for receivers

// 4. Init Frequency, config channel
setFreq(LoraDown->freq);

//writeRegister(REG_PREAMBLE_LSB, (uint8_t) LoraDown->prea & 0xFF); // Leave to default

writeRegister(REG_SYNC_WORD, (uint8_t) 0x34); // set 0x39 to 0x34==LORA_MAC_PREAMBLE
writeRegister(REG_PARAMP, (readRegister(REG_PARAMP) & 0xF0) | 0x08); // set 0x08 ramp-up time 50 uSec
//writeRegister(REG_PADAC_SX1276, 0x84); // set 0x4D (PADAC) to 0x84
writeRegister(REG_SYNC_WORD, (uint8_t) 0x34); // set 0x39 to 0x34==LORA_MAC_PREAMBLE
writeRegister(REG_PARAMP,(readRegister(REG_PARAMP) & 0xF0) | 0x08); // set 0x08 ramp-up time 50 uSec
//writeRegister(REG_PADAC_SX1276, 0x84); // set 0x4D (PADAC) to 0x84
//writeRegister(REG_DET_TRESH, 0x0A); // 210117 Detection Treshhold
writeRegister(REG_LNA, (uint8_t) LNA_MAX_GAIN); // set reg 0x0C to 0x23
writeRegister(REG_LNA, (uint8_t) LNA_MAX_GAIN); // set reg 0x0C to 0x23

// 6. Set power level, REG_PAC
setPow(LoraDown->powe);

// 7. prevent node to node communication
//writeRegister(REG_INVERTIQ, readRegister(REG_INVERTIQ) | (uint8_t)(LoraDown->iiq)); // set 0x33, (0x27 up or |0x40 down)
writeRegister(REG_INVERTIQ, readRegister(REG_INVERTIQ) | 0x40); // set 0x33 to (0x27 (reserved) | 0x40) for downstream
//writeRegister(REG_INVERTIQ, readRegister(REG_INVERTIQ) | (uint8_t)(LoraDown->iiq));
// set 0x33, (0x27 up or |0x40 down)
writeRegister(REG_INVERTIQ, readRegister(REG_INVERTIQ) | 0x40); // set 0x33 to (0x27 (reserved) | 0x40) for downstream
writeRegister(REG_INVERTIQ2, 0x19);

// 8. set the IRQ mapping DIO0=TxDone DIO1=NOP DIO2=NOP (or less for 1ch gateway)
// 8. set the IRQ mapping DIO0=TxDone, DIO1=NOP, DIO2=NOP (for 1ch gateway)
writeRegister(REG_DIO_MAPPING_1, (uint8_t)(
MAP_DIO0_LORA_TXDONE |
MAP_DIO1_LORA_NOP |
MAP_DIO2_LORA_NOP |
MAP_DIO3_LORA_NOP)); // was MAP_DIO3_LORA_CRC
MAP_DIO3_LORA_NOP)); // was MAP_DIO3_LORA_CRC

// 9. mask all IRQs but TxDone
writeRegister(REG_IRQ_FLAGS_MASK, (uint8_t) ~IRQ_LORA_TXDONE_MASK);

// 10. clear all radio IRQ flags
writeRegister(REG_IRQ_FLAGS, (uint8_t) 0xFF);
//writeRegister(REG_IRQ_FLAGS, (uint8_t) IRQ_LORA_TXDONE_MASK); // set reg 0x12 to 0x08, clear TXDONE
//writeRegister(REG_IRQ_FLAGS, (uint8_t) IRQ_LORA_TXDONE_MASK); // set reg 0x12 to 0x08, clear TXDONE

// FSTX setting
opmode(OPMODE_FSTX); // set reg 0x01 to 0x02 (actual value becomes 0x82)
delay(1); // MMM
//opmode(OPMODE_FSTX); // set reg 0x01 to 0x02 (actual value becomes 0x82)
//delay(1); // MMM

//Set the base addres of the transmit buffer in FIFO
writeRegister(REG_FIFO_ADDR_PTR, (uint8_t) readRegister(REG_FIFO_TX_BASE_AD)); // set 0x0D to 0x0F (contains 0x80);
writeRegister(REG_FIFO_ADDR_PTR, (uint8_t) readRegister(REG_FIFO_TX_BASE_AD));
// set 0x0D to 0x0F (contains 0x80);

//For TX we have to set the PAYLOAD_LENGTH
writeRegister(REG_PAYLOAD_LENGTH, (uint8_t) LoraDown->size); // set reg 0x22 to 0x40==64Byte long
writeRegister(REG_PAYLOAD_LENGTH, (uint8_t) LoraDown->size); // set reg 0x22 to 0x40==64Byte long

//For TX we have to set the MAX_PAYLOAD_LENGTH
writeRegister(REG_MAX_PAYLOAD_LENGTH, (uint8_t) MAX_PAYLOAD_LENGTH); // set reg 0x22, max 0x40==64Byte long
writeRegister(REG_MAX_PAYLOAD_LENGTH, (uint8_t) MAX_PAYLOAD_LENGTH);// set reg 0x22, max 0x40==64Byte long

# if _MONITOR >= 1
if ((debug>=2) && (pdebug & P_TX)) {
Expand Down Expand Up @@ -917,12 +929,13 @@ void txLoraModem(struct LoraDown *LoraDown)
}

// 16. Initiate actual transmission of FiFo, after opmode TX it switches to standby mode
delayMicroseconds(WAIT_CORRECTION>>1); // q0 milliseconds
delayMicroseconds(WAIT_CORRECTION); // q0 milliseconds
opmode(OPMODE_TX); // set reg 0x01 to 0x03 (actual value becomes 0x83)
delayMicroseconds(WAIT_CORRECTION>>1); // q0 milliseconds

// After message transmitted the sender switches to STANDBY state, and issues TXDONE

yield(); // MMM 210720

}// txLoraModem


Expand Down
15 changes: 11 additions & 4 deletions src/_stateMachine.ino
Original file line number Diff line number Diff line change
Expand Up @@ -816,6 +816,8 @@ void stateMachine()
}
# endif //_MONITOR

yield(); // MMM 210720

break; // S_TX


Expand All @@ -838,10 +840,10 @@ void stateMachine()
response += ", done= ";
if (micros() < LoraDown.tmst) {
response += "-" ;
printInt(LoraDown.tmst - micros(), response );
printInt((LoraDown.tmst-micros())/1000000, response );
}
else {
printInt(micros()-LoraDown.tmst, response);
printInt((micros()-LoraDown.tmst)/1000000, response);
}
mPrint(response);
}
Expand Down Expand Up @@ -871,7 +873,7 @@ void stateMachine()
break;
case 2:
# if _MONITOR>=1
if ((debug>=3) && (pdebug & P_TX)) {
if ((debug>=1) && (pdebug & P_TX)) {
mPrint("^ TX_ACK:: readUDP: protocol version 2+");
}
# endif //_MONITOR
Expand Down Expand Up @@ -913,7 +915,7 @@ void stateMachine()
}
else {
# if _MONITOR>=1
if ((debug>=2) && (pdebug & P_TX)) {
if ((debug>=1) && (pdebug & P_TX)) {
mPrint("^ readUdp:: TX_ACK: micros="+String(micros()));
}
# endif //_MONITOR
Expand All @@ -926,6 +928,11 @@ void stateMachine()
}
# endif //_MONITOR
}

// Transmission finifhed. Reset the all flags in the registers
writeRegister(REG_IRQ_FLAGS_MASK, (uint8_t) 0xFF);
writeRegister(REG_IRQ_FLAGS, (uint8_t) 0x00);

yield();
}

Expand Down
2 changes: 1 addition & 1 deletion src/_txRx.ino
Original file line number Diff line number Diff line change
Expand Up @@ -264,7 +264,7 @@ int sendPacket(uint8_t *buf, uint8_t len)
return(-1);
}

// _STRICT_1CH determines how we will react on downstream messages.
// _STRICT_1CH determines how we will react for downstream messages.
//
#if _STRICT_1CH == 0
// if _STRICT_1CH == 0, we will receive messags from the TTN gateway presumably on
Expand Down
6 changes: 3 additions & 3 deletions src/_udpSemtech.ino
Original file line number Diff line number Diff line change
Expand Up @@ -86,7 +86,7 @@ bool connectUdp()
// Packetsize: size of the buffer to read, as read by loop() calling function
//
// Byte 0: Contains Protocol Version
// Byte 1+2: Contain Token
// Byte 1+2: Contains Token
// Byte 3: Contains PULL_RESP or other identifier
// Byte 4-n: Contains payload (or Gateway EUI 8 bytes first)
//
Expand Down Expand Up @@ -292,14 +292,14 @@ int readUdp(int packetSize)
# ifdef _PROFILER
if ((debug>=1) && (pdebug & P_TX)) {
char res[128];
sprintf(res, "v PULL_RESP:: token=%u, size=%u, IP=%d.%d.%d.%d, port=%d, prot=%u, mics=%lu",
sprintf(res, "v PULL_RESP:: token=%u, size=%u, IP=%d.%d.%d.%d, port=%d, prot=%u, secs=%lu",
token,
(uint16_t) LoraDown.fcnt,
//packetSize,
remoteIpNo[0], remoteIpNo[1], remoteIpNo[2], remoteIpNo[3],
remotePortNo,
protocol,
(unsigned long) micros()
(unsigned long) micros()/1000000
);
mPrint(res);
}
Expand Down
2 changes: 1 addition & 1 deletion src/_utils.ino
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@

// --------------------------------------------------------------------------------
// PRINT INT
// The function printInt prints a number with Thousands seperator
// The function printInt prints a number with uSec seperator
// Paraneters:
// i: Integer containing Microseconds
// response: String & value containing the converted number
Expand Down
2 changes: 1 addition & 1 deletion src/configGway.h
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// 1-channel LoRa Gateway for ESP32 and ESP8266
// Copyright (c) Maarten Westenberg 2016-2021

#define VERSION "V.6.2.8.EU868; PlatformIO 210712 a; GIT"
#define VERSION "V.6.2.8.EU868; PlatformIO 211015 a; distri GIT"

//
// Based on work done by Thomas Telkamp for Raspberry PI 1ch gateway and many others.
Expand Down
16 changes: 8 additions & 8 deletions src/loraModem.h
Original file line number Diff line number Diff line change
Expand Up @@ -220,8 +220,8 @@ struct pins {
uint8_t dio0=5; // GPIO5 / D1. Dio0 used for one frequency and one SF
uint8_t dio1=4; // GPIO4 / D2. Used for CAD, may or not be shared with DIO0
uint8_t dio2=0; // GPIO0 / D3. Used for frequency hopping, don't care
uint8_t ss=15; // GPIO15 / D8. Select pin connected to GPIO15
uint8_t rst=0; // GPIO0 / D3. Reset pin not used
uint8_t ss=15; // GPIO15/ D8. Select pin connected to GPIO15
uint8_t rst=0; // GPIO0 / D3. Reset pin not used
} pins;


Expand Down Expand Up @@ -381,7 +381,7 @@ uint8_t payLoad[128]; // Payload i

// ====================================================================
// PACKET FORWARDER
// Smetech Specification
// Semtech Specification
// https://github.com/Lora-net/packet_forwarder/blob/master/PROTOCOL.TXT
// Some parts are included both at Upstram and Downstream since
// the gateway can also be used as a repeater
Expand All @@ -401,7 +401,7 @@ struct LoraDown {
uint8_t bw; // through datr

bool ipol;
uint8_t powe; // transmit power, normally 14, except when using special channel
uint8_t powe; // transmit power == 14, except when using special channel
uint8_t crc;
uint8_t iiq; // message inverted or not for node-node communiction
uint8_t imme; // Immediate transfer execution
Expand Down Expand Up @@ -551,7 +551,7 @@ struct LoraUp {
// ----------------------------------------
// LOW NOISE AMPLIFIER

#define LNA_MAX_GAIN 0x23 // Max gain 0x20 | Boost 0x03
#define LNA_MAX_GAIN 0x23 // Max gain 0x20 | Boost 0x03
#define LNA_OFF_GAIN 0x00
#define LNA_LOW_GAIN 0x20

Expand Down Expand Up @@ -606,9 +606,9 @@ struct LoraUp {
#define MAP_DIO1_LORA_NOP 0x30 // --11----

#define MAP_DIO2_LORA_FCC0 0x00 // ----00-- bit 3 and 2
#define MAP_DIO2_LORA_FCC1 0x04 // ----01-- bit 3 and 2
#define MAP_DIO2_LORA_FCC2 0x08 // ----10-- bit 3 and 2
#define MAP_DIO2_LORA_NOP 0x0C // ----11-- bit 3 and 2
#define MAP_DIO2_LORA_FCC1 0x04 // ----01--
#define MAP_DIO2_LORA_FCC2 0x08 // ----10--
#define MAP_DIO2_LORA_NOP 0x0C // ----11--

#define MAP_DIO3_LORA_CADDONE 0x00 // ------00 bit 1 and 0
#define MAP_DIO3_LORA_HEADER 0x01 // ------01
Expand Down

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