Enable mm #159
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jiaxinwu
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Jul 3, 2024
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgBuildOption.dsc
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Force PE/COFF sections to be aligned at 4KB boundaries to support MemoryAttribute table. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
This patch changes below dynamic PCD to fixed PCD for MM_STANDALONE: gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0 gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0 Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Enable PcdRestartMmDispatcherOnceMmEntryRegistered PCD Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Add PcdStandaloneMmEnable feature PCD, default set to FALSE. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Include required StandaloneMm drivers under PcdStandaloneMmEnable PCD. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Include required StandaloneMm Drivers and Libs under PcdStandaloneMmEnable PCD. Change the PcdStandaloneMmEnable to TRUE to enable the MM on QSP. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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Add PcdCpuSmmProfileEnable & PcdCpuSmmRestrictedMemoryAccess for the SmmProfile enable/disable control for QSP. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
The instructions in BaseMemoryLibRepStr could potentially
trigger multiple #PF (Page Faults) before the Debug Trap
handler is invoked if the size of the memory being copied
exceeds 8KB. This would result in the number of recorded
old entries bigger than the MAX_PF_ENTRY_COUNT limit of
10. The relevant instructions are:
mov rcx, r8
and r8, 7
shr rcx, 3
rep movsq
To prevent this issue, override the BaseMemoryLib with
BaseMemoryLibSse2 when the SMM profile is enabled. This
change avoids the use of the "rep movsq" instruction, which
is the source of the problem.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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