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[WIP] Add SiFive Unmatched support #38

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yqszxx
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@yqszxx yqszxx commented Mar 22, 2022

  • The U7SeriesPkg is basically adapted from the U5SeriesPkg, small modifications are maded for unmatched, code are not fully cleaned up
  • PCIe RC driver for U740 will be added

@changab
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changab commented Mar 22, 2022

@yqszxx
Hi Boyang,
Thanks for working on this. I will take a look at those changes.
BTW, did you verify U7 edk2 port on the real SiFIve platform? Can it boot to EFI shell?

@yqszxx
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yqszxx commented Mar 24, 2022

@yqszxx Hi Boyang, Thanks for working on this. I will take a look at those changes. BTW, did you verify U7 edk2 port on the real SiFIve platform? Can it boot to EFI shell?

Hello! The latest commit is tested on real SiFive Unmatched hardware, and it can boot to shell. I will update the procedure in detail in the readme file in one or two days.

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changab commented Mar 27, 2022

Thanks!
BTW, we usually review the patches through edk2 mailing list but not PR. So please send your final set of patches against edk2-platform repo to devel@edk2.groups.io as well. thus people can give comments using email.

@yqszxx
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yqszxx commented Mar 28, 2022

Thank you for your reply! I'm still learning how to collaborate using mail list😄 I will present the final patch when I finished the PCIe driver✅

@hanf2x
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hanf2x commented Jan 12, 2023

Without the pcie driver working, the most of the board's peripherals cannot function.

@bcran
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bcran commented Jan 21, 2023

I decided to try building and running code from your branch on my Unmatched board.
However, it asserts early on:

Freedom FSBL: 2023-01-20-7fdeede-dirty
Loading boot payload................

Use DBT FV
FindFfsFileAndSection: DBT FV at 0x80840000
FindFfsFileAndSection: FV at 80840000 does not have FV header signature
Use DBT FV
FindFfsFileAndSection: DBT FV at 0x80840000
FindFfsFileAndSection: FV at 80840000 does not have FV header signature
Platform Device Tree is not found on boot hart
ASSERT [SecMain] /home/bcran/src/uefi/edk2-platforms/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c(684): ((BOOLEAN)(0==1))

Is there a step I've missed?

@bcran
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bcran commented Jan 21, 2023

By the way the branch is quite out-of-date now. I added the following changes to get it working:

diff --git a/Platform/SiFive/U7SeriesPkg/FreedomU740HiFiveUnmatchedBoard/U740.dsc b/Platform/SiFive/U7SeriesPkg/FreedomU740HiFiveUnmatchedBoard/U740.dsc
index 2af45f8739..8dd4f6e80e 100644
--- a/Platform/SiFive/U7SeriesPkg/FreedomU740HiFiveUnmatchedBoard/U740.dsc
+++ b/Platform/SiFive/U7SeriesPkg/FreedomU740HiFiveUnmatchedBoard/U740.dsc
@@ -102,6 +102,7 @@
   UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
   FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
   VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
+  VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
 
 # RISC-V Platform Library
   TimeBaseLib|EmbeddedPkg//Library/TimeBaseLib/TimeBaseLib.inf
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c
index 93fbde619f..0fda5b0a0a 100644
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c
@@ -147,8 +147,6 @@ RiscVSupervisorModeTrapHandler (
   elsewhere and are necessary for the extra initializations of exception.
 
   @param[in]  VectorInfo    Pointer to reserved vector list.
-  @param[in]  InitData      Pointer to data optional for extra initializations
-                            of exception.
 
   @retval EFI_SUCCESS             The exceptions have been successfully
                                   initialized.
@@ -160,13 +158,39 @@ RiscVSupervisorModeTrapHandler (
 EFI_STATUS
 EFIAPI
 InitializeCpuExceptionHandlersEx (
-  IN EFI_VECTOR_HANDOFF_INFO  *VectorInfo OPTIONAL,
-  IN CPU_EXCEPTION_INIT_DATA  *InitData OPTIONAL
+  IN EFI_VECTOR_HANDOFF_INFO  *VectorInfo OPTIONAL
   )
 {
   return InitializeCpuExceptionHandlers (VectorInfo);
 }
 
+/**
+  Setup separate stacks for certain exception handlers.
+  If the input Buffer and BufferSize are both NULL, use global variable if possible.
+
+  @param[in]       Buffer        Point to buffer used to separate exception stack.
+  @param[in, out]  BufferSize    On input, it indicates the byte size of Buffer.
+                                 If the size is not enough, the return status will
+                                 be EFI_BUFFER_TOO_SMALL, and output BufferSize
+                                 will be the size it needs.
+
+  @retval EFI_SUCCESS             The stacks are assigned successfully.
+  @retval EFI_UNSUPPORTED         This function is not supported.
+  @retval EFI_BUFFER_TOO_SMALL    This BufferSize is too small.
+**/
+EFI_STATUS
+EFIAPI
+InitializeSeparateExceptionStacks (
+  IN     VOID   *Buffer,
+  IN OUT UINTN  *BufferSize
+  )
+{
+
+return EFI_UNSUPPORTED;
+
+}
+
+
 /**
   The constructor function to initial interrupt handlers in
   RISCV_MACHINE_MODE_CONTEXT.

@bcran
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bcran commented Jan 22, 2023

Sorry, my build must have been polluted: after deleting the Build directory and rebuilding I can now boot to the UEFI Shell.

@changab
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changab commented Jan 27, 2023

That is great to hear this. I am almost out of the RISC-V world and we need someone to keep maintaining SiFive platforms. It would be better if we can get someone form SiFive on board.

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4 participants