Add note re: image size

timvideos · Oct 11, 2019 · 534513f · 534513f
1 parent 79c0cd8
commit 534513f
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/platforms/icefun.py b/platforms/icefun.py
@@ -64,6 +64,7 @@ class Platform(LatticePlatform):
     default_clk_name = "clk12"
     default_clk_period = 83.333
 
+    # gateware_size = 3*64*1024 # from icefundocs first 3 64k sectors reserved for FPGA
     gateware_size = 0x28000
 
     # FIXME: Create a "spi flash module" object in the same way we have SDRAM