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Allow to boot Linux from flash #340

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merged 3 commits into from
Apr 8, 2020
Merged

Allow to boot Linux from flash #340

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5af7e16
Update litex-renode submodule
mateusz-holenko Apr 8, 2020
4cd37cb
targets: Define offsets of Linux binaries in flash
mateusz-holenko Feb 17, 2020
e72f7c4
build-renode: Allow to boot Linux from flash
mateusz-holenko Feb 5, 2020
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26 changes: 20 additions & 6 deletions scripts/build-renode.sh
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Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@ case $CPU in
;;
esac

LITEX_RENODE="$TOP_DIR/third_party/litex-renode"
LITEX_CONFIG_FILE="$TARGET_BUILD_DIR/test/csr.csv"
if [ ! -f "$LITEX_CONFIG_FILE" ]; then
make firmware
Expand Down Expand Up @@ -75,12 +76,25 @@ RENODE_RESC="$RENODE_SCRIPTS_DIR/litex_buildenv.resc"
RENODE_REPL="$RENODE_SCRIPTS_DIR/litex_buildenv.repl"

mkdir -p $RENODE_SCRIPTS_DIR
python $TOP_DIR/third_party/litex-renode/generate-renode-scripts.py $LITEX_CONFIG_FILE \
--repl "$RENODE_REPL" \
--resc "$RENODE_RESC" \
--bios-binary "$TARGET_BUILD_DIR/software/bios/bios.bin" \
--firmware-binary "$TARGET_BUILD_DIR/software/$FIRMWARE/firmware.bin" \
--configure-network ${TAP_INTERFACE:-""}

if [ "$FIRMWARE" == "linux" ]; then
python $LITEX_RENODE/generate-renode-scripts.py $LITEX_CONFIG_FILE \
--repl "$RENODE_REPL" \
--resc "$RENODE_RESC" \
--bios-binary "$TARGET_BUILD_DIR/software/bios/bios.bin" \
--flash-binary "$TARGET_BUILD_DIR/software/linux/firmware.bin:kernel_image_flash_offset" \
--flash-binary "$TARGET_BUILD_DIR/software/linux/riscv32-rootfs.cpio:rootfs_image_flash_offset"\
--flash-binary "$TARGET_BUILD_DIR/software/linux/rv32.dtb:device_tree_image_flash_offset" \
--flash-binary "$TARGET_BUILD_DIR/emulator/emulator.bin:emulator_image_flash_offset" \
--configure-network ${TAP_INTERFACE:-""}
else
python $LITEX_RENODE/generate-renode-scripts.py $LITEX_CONFIG_FILE \
--repl "$RENODE_REPL" \
--resc "$RENODE_RESC" \
--bios-binary "$TARGET_BUILD_DIR/software/bios/bios.bin" \
--firmware-binary "$TARGET_BUILD_DIR/software/$FIRMWARE/firmware.bin" \
--configure-network ${TAP_INTERFACE:-""}
fi

# 1. include the generated script
# 2. set additional parameters
Expand Down
4 changes: 2 additions & 2 deletions targets/arty/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
from gateware import info
from gateware import spi_flash

from targets.utils import period_ns, dict_set_max
from targets.utils import period_ns, dict_set_max, define_flash_constants
from .crg import _CRG


Expand Down Expand Up @@ -93,7 +93,7 @@ def __init__(self, platform, spiflash="spiflash_1x", **kwargs):

bios_size = 0x8000
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# Support for soft-emulation for full Linux support ----------------------------------------
if self.cpu_type == "vexriscv" and self.cpu_variant == "linux":
Expand Down
4 changes: 2 additions & 2 deletions targets/atlys/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@
from gateware import info
from gateware import spi_flash

from targets.utils import dict_set_max
from targets.utils import dict_set_max, define_flash_constants
from .crg import _CRG


Expand Down Expand Up @@ -94,7 +94,7 @@ def __init__(self, platform, **kwargs):

bios_size = 0x8000
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# Support for soft-emulation for full Linux support ----------------------------------------
if self.cpu_type == "vexriscv" and self.cpu_variant == "linux":
Expand Down
4 changes: 2 additions & 2 deletions targets/ice40_hx8k_b_evn/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@
from gateware import info
from gateware import spi_flash

from targets.utils import dict_set_max, platform_toolchain_extend, round_up_to_4
from targets.utils import dict_set_max, platform_toolchain_extend, round_up_to_4, define_flash_constants

from .crg import _CRG

Expand Down Expand Up @@ -127,7 +127,7 @@ def __init__(self, platform, **kwargs):
type="cached+linker")

self.flash_boot_address = spiflash_user_base
self.add_constant("FLASH_BOOT_ADDRESS", spiflash_user_base)
define_flash_constants(self)

# Make the LEDs flash ----------------------------------------------------------------------
cnt = Signal(32)
Expand Down
3 changes: 2 additions & 1 deletion targets/ice40_up5k_b_evn/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
from gateware import ice40
from gateware import spi_flash

from targets.utils import define_flash_constants
import platforms.ice40_up5k_b_evn as up5k


Expand Down Expand Up @@ -99,7 +100,7 @@ def __init__(self, platform, **kwargs):
"rom", kwargs['cpu_reset_address'], bios_size,
type="cached+linker")
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# SPRAM- UP5K has single port RAM, might as well use it as SRAM to
# free up scarce block RAM.
Expand Down
3 changes: 2 additions & 1 deletion targets/icebreaker/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
from gateware import cas
from gateware import spi_flash

from targets.utils import define_flash_constants
from platforms import icebreaker


Expand Down Expand Up @@ -111,7 +112,7 @@ def __init__(self, platform, **kwargs):
"rom", kwargs['cpu_reset_address'], bios_size,
type="cached+linker")
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# SPRAM- UP5K has single port RAM, might as well use it as SRAM to
# free up scarce block RAM.
Expand Down
4 changes: 2 additions & 2 deletions targets/icefun/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
from gateware import cas
from gateware import spi_flash

from targets.utils import dict_set_max
from targets.utils import dict_set_max, define_flash_constants


class _CRG(Module):
Expand Down Expand Up @@ -84,7 +84,7 @@ def __init__(self, platform, **kwargs):
"rom", kwargs['cpu_reset_address'], bios_size,
type="cached+linker")
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# We don't have a DRAM, so use the remaining SPI flash for user
# program.
Expand Down
4 changes: 2 additions & 2 deletions targets/mimasv2/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@
from gateware import info
from gateware import spi_flash

from targets.utils import dict_set_max
from targets.utils import dict_set_max, define_flash_constants
from .crg import _CRG


Expand Down Expand Up @@ -105,7 +105,7 @@ def __init__(self, platform, **kwargs):
"rom", kwargs['cpu_reset_address'], bios_size,
type="cached+linker")
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)


SoC = BaseSoC
4 changes: 2 additions & 2 deletions targets/minispartan6/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
from gateware import info
from gateware import spi_flash

from targets.utils import dict_set_max
from targets.utils import dict_set_max, define_flash_constants
from .crg import _CRG


Expand Down Expand Up @@ -87,7 +87,7 @@ def __init__(self, platform, **kwargs):
"rom", kwargs['cpu_reset_address'], bios_size,
type="cached+linker")
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)


SoC = BaseSoC
4 changes: 2 additions & 2 deletions targets/opsis/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@

from .crg import _CRG

from targets.utils import dict_set_max
from targets.utils import dict_set_max, define_flash_constants


class FrontPanelGPIO(Module, AutoCSR):
Expand Down Expand Up @@ -158,7 +158,7 @@ def __init__(self, platform, **kwargs):

bios_size = 0x8000
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# Support for soft-emulation for full Linux support ----------------------------------------
if self.cpu_type == "vexriscv" and self.cpu_variant == "linux":
Expand Down
4 changes: 2 additions & 2 deletions targets/pipistrello/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@
from gateware import info
from gateware import spi_flash

from targets.utils import dict_set_max
from targets.utils import dict_set_max, define_flash_constants
from .crg import _CRG


Expand Down Expand Up @@ -96,7 +96,7 @@ def __init__(self, platform, **kwargs):

bios_size = 0x8000
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# Support for soft-emulation for full Linux support ----------------------------------------
if self.cpu_type == "vexriscv" and self.cpu_variant == "linux":
Expand Down
4 changes: 2 additions & 2 deletions targets/sim/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@

from gateware import firmware

from targets.utils import dict_set_max
from targets.utils import dict_set_max, define_flash_constants


class BaseSoC(SoCSDRAM):
Expand Down Expand Up @@ -42,7 +42,7 @@ def __init__(self, platform, **kwargs):
self.submodules.firmware_ram = firmware.FirmwareROM(firmware_ram_size, firmware_filename)
self.register_mem("firmware_ram", self.mem_map["firmware_ram"], self.firmware_ram.bus, firmware_ram_size)
self.flash_boot_address = self.mem_map["firmware_ram"]
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# sdram
sdram_module = IS42S16160(self.clk_freq, "1:1")
Expand Down
4 changes: 2 additions & 2 deletions targets/tinyfpga_bx/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
from gateware import cas
from gateware import spi_flash

from targets.utils import dict_set_max
from targets.utils import dict_set_max, define_flash_constants
from .crg import _CRG


Expand Down Expand Up @@ -70,7 +70,7 @@ def __init__(self, platform, **kwargs):
"rom", kwargs['cpu_reset_address'], bios_size,
type="cached+linker")
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size+platform.bootloader_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# We don't have a DRAM, so use the remaining SPI flash for user
# program.
Expand Down
3 changes: 2 additions & 1 deletion targets/upduino_v1/base.py
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
from gateware import ice40
from gateware import spi_flash

from targets.utils import define_flash_constants
import platforms.upduino_v1 as upduino


Expand Down Expand Up @@ -85,7 +86,7 @@ def __init__(self, platform, **kwargs):
"rom", kwargs['cpu_reset_address'], bios_size,
type="cached+linker")
self.flash_boot_address = self.mem_map["spiflash"]+platform.gateware_size+bios_size
self.add_constant("FLASH_BOOT_ADDRESS", self.flash_boot_address)
define_flash_constants(self)

# SPRAM- UP5K has single port RAM, might as well use it as SRAM to
# free up scarce block RAM.
Expand Down
8 changes: 8 additions & 0 deletions targets/utils.py
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Original file line number Diff line number Diff line change
Expand Up @@ -139,6 +139,14 @@ def platform_toolchain_extend(platform, cmdname, argument):
bt.clear()
bt.extend(_platform_toolchain_cmd_join(cmds))

def define_flash_constants(soc):
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I think this should probably go into upstream LiteX or something in the future?

soc.add_constant("FLASH_BOOT_ADDRESS", soc.flash_boot_address)
if soc.cpu_variant == "linux":
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BTW It would be much better for these to be ordered,

  • Emulator
  • DTS
  • Kernel
  • Root FS

Emulator + DTS could be needed for non-Linux applications / operating systems. Both should be pretty small / constant size.

The RootFS is the one which is most likely to be variable in size so should be at the one at end.

Probably should also add constants for MAX_SIZE here?

soc.add_constant("KERNEL_IMAGE_FLASH_OFFSET", 0x00000000)
soc.add_constant("ROOTFS_IMAGE_FLASH_OFFSET", 0x00500000)
soc.add_constant("DEVICE_TREE_IMAGE_FLASH_OFFSET", 0x00D00000)
soc.add_constant("EMULATOR_IMAGE_FLASH_OFFSET", 0x00D80000)


if __name__ == "__main__":
import doctest
Expand Down
2 changes: 1 addition & 1 deletion third_party/litex-renode
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Submodule litex-renode updated 1 files
+1 −1 generate-renode-scripts.py