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chore(tests): Increase time bias limit to 0.02 #529
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On my RISC-V board, it would be a little more than 0.01, such as 0.012354135513305664. Signed-off-by: Xeonacid <xeonacid@hit.edu.cn>
Codecov ReportAll modified and coverable lines are covered by tests ✅
Additional details and impacted files@@ Coverage Diff @@
## master #529 +/- ##
==========================================
- Coverage 88.76% 88.38% -0.38%
==========================================
Files 37 37
Lines 3685 3797 +112
Branches 526 549 +23
==========================================
+ Hits 3271 3356 +85
- Misses 281 304 +23
- Partials 133 137 +4 ☔ View full report in Codecov by Sentry. |
While I don't see a CLA message showing you signed it, I see you on https://cla-assistant.io/ |
Potentially fixes #481, cc @johanneskastl |
Also related to #477 and #478 (comment). |
@Xeonacid FYI: After merge, I may extract the |
Glad to see that! Or you may tell me how much you want so I can just fix in this PR. |
No. I take that back, I don't want this. |
Could you please explain why? As the issues you mentioned, it seems flaky and reproduces on many architectures. |
Upstream actively rejected the patch: tmux-python/libtmux#529 (comment) Signed-off-by: Xeonacid <h.dwwwwww@gmail.com>
Upstream actively rejected the patch: tmux-python/libtmux#529 (comment) Signed-off-by: Xeonacid <h.dwwwwww@gmail.com>
On my RISC-V board, it would be a little more than 0.01, such as 0.012354135513305664.