Affordable 2 GHz 3.2 GS/s 12 bit open-source open-hardware expandable USB oscilloscope
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Apr 25, 2025 - Verilog
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altera-fpga
Here are 24 public repositories matching this topic...
Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.
fpga verilog logic-analyzer xilinx-fpga altera-fpga lattice-fpga digital-signal-analyzer ftdi232h ftdi2232h
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Jun 24, 2021 - Verilog
Verilog code to replace the Commodore SDMAC found in the A3000
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Mar 3, 2025 - Verilog
SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)
linux fpga python-script intel bootloader altera can-bus fpga-soc embedded-linux quartus-prime intel-fpga altera-fpga hps fpga-configuration soc-fpga fpga-fabric mapping-hps-peripherals rsyocto
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Jun 9, 2021 - Verilog
透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。
fpga digital vhdl verilog learn xilinx digital-logic systemverilog hdl verilog-hdl xilinx-fpga xilinx-vivado digital-logic-design altera-fpga altera-cyclone-v-sockit altera-cyclone-iii-de0 altera-quartus soc-kit altera-cyclone vhdl-verilog
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Oct 25, 2023 - Verilog
This project aims to boot Linux on a RocektChip based SoC, synthesised on the DE10-Nano board. Computer Science Bachelor's Thesis at UAB, Spain.
fpga riscv altera ucberkeley risc-v altera-fpga riscv-asm de10-nano riscv64 terasic rocketchip riscv-assembly chipyard
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Feb 7, 2022 - Verilog
Hardware description of a complete Ballot Box made in Verilog with implementation in FPGA-Altera-DE-2-155, made in Verilog with Quartus Prime in discipline ISL for computer science graduation.
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Apr 25, 2019 - Verilog
Thesis covers research on digital signal processing with software defined radio techniques applied in FPGA environment. It is written entirely in Polish language, except english abstract
fpga hardware signal-processing verilog sdr altera digital-signal-processing digital-design dcf77 dcf-decoder altera-fpga
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May 22, 2018 - Verilog
Implementation of an Edge Detection Filter Using the Avalon Interface
fpga verilog edge-detection avalon sobel quartus altera-fpga sobel-filter rgb2gray sobel-edge-detector avalon-bus avalon-streaming
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Jan 30, 2023 - Verilog
FPGA based Logic analyzer designed then FPGA implemented on ALTERA cyclone IV FPGA
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Nov 21, 2022 - Verilog
Laboratório de Arquitetura de Sistemas Digitais, ministrado pelo professor Rafael Bezerra Correia Lima. Foram desenvolvidos 8 requisitos de hardware, 1 requisito de software e 1 projeto de disciplina que totalizam 10 Sprints. A arquitetura de sistemas implementada é baseada em MIPS 8 bits, e desenvolvidos e testados na FGPA Ciclone II EP2C35F672C6
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Feb 9, 2023 - Verilog
Verilog RISC Processor Design
processor-architecture pipeline processor cyclone verilog altera risc hdl verilog-hdl quartus-prime cyclone-iv cyclone-v altera-fpga verilog-project verilog-code
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Jul 8, 2021 - Verilog
📌 The idea of this project is to build a system that uses the existing lights to detect the location of a user within an indoor environment. For this, we can use Visible Light Communication (VLC) technology. The basic concept is to have four LEDs transmitting their IDs one after the other at fixed intervals.
c-sharp arduino fpga intel visible-light-communication uart-protocol serial-communication altera-fpga
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Apr 27, 2023 - Verilog
This repository showcases a Verilog-based Snake and Apple Game, developed for the ECL 106: Digital System Design with HDL course. Running on an Altera DE10-Lite FPGA board and displayed on a VGA monitor, players control a snake to collect apples while avoiding obstacles. The snake grows longer with each apple, making the game progressively harder.
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Feb 5, 2025 - Verilog
These labs were conducted during our Digital systems elective course were we were instructed to build Verilog code for specific logic design and verify it on Quartus modalism and on the FPGA. Skills developed: writing Verilog code structurally and behaviorally, testing, simulation, writing test benches and using the FPGA
design fpga digital simulation verilog testbenches modelsim altera-fpga fpga-programming digitallogic verilog-code
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Jan 11, 2021 - Verilog
💡A Quartus II project testing the functionality of the Altera Cyclone IV EP4CE6E22C8N board
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Mar 10, 2020 - Verilog
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