🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

AMBA AXI VIP

Code generation tool for control and status registers

SD-Card controller, using either SPI, SDIO, or eMMC interfaces

Network on Chip Implementation written in SytemVerilog

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.

Control and status register code generator toolchain

An open-source HDL register code generator fast enough to run in real time.

OPAE porting to Xilinx FPGA devices.

Simple single-port AXI memory interface

Xilinx PCIe to MIG DDR4 example designs and custom part data files

Xilinx AXI VIP example of use

High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model

Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface

Implementation of the Advanced Encryption Standard in Chisel

AXI X-Bar

XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA

Hardware and Software Co-design implementations