v0.2.5 release

Evolutions summary:

core

• limit the progressBar update rate to 5 per second. This speeds up loading of small bin files.
• cable: always display real used frequency
• recast verbose to int8_t to have more level of verbosity (-1 quiet, 0 normal, 1 verbose), add --quiet option, display progress bar when verbosity level >= 0
• main: catch exception if FPGA can't be claimed.
• display: add warning message
• ftdipp_mpsse: don't configures high bytes for devices with only one bank per channel

boards

• efinix Xyloni
• seeedstudio runber (gowin GW1N-4)
• board: add entry for tec0117 (alias for Trenz littleBee)

filetype

• configBitstreamParser: introduce a buffer for unprocessed file content, external access to header keys/values
• anlogicBitParser, efinixHexParser: use _raw_data and work with this one instead of file descriptor
• dfuFileParser: parser for bitstream with DFU suffix
• svf_jtag: suppress CR when file is in DOS format
• rawParser: use raw_data buffer
• fsparser: rewrite to use header instead of comments, add support for
  compressed bitstream, display warning message for missing or unknown idcode, add missing GW1N-4(ES) idcode

parts

• xilinx: allow bin file to memory

doc

• update xilinx section
• add note for default behavior (memory/flash) and offset option

contributors

• Gwenhael Goavec-Merou (@trabucayre)
• phdussud (@phdussud)