[OPTIMIZER] Adjusted heuristics #1001
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Aug 5, 2024
…tel SPIR-V Extension (triton-lang#1074) Related to issue triton-lang#1001. This pass is already lowering `arith::TruncFOp` and `arith::ExtFOp`, so there was the original suggesting of lowering to arith operators didn't make sense, but I have replace most of the bit operations with calls to an Intel SPIR-V extension that translates to a MOV instruction in vISA. I couldn't remove the round to zero mode of `convertFp32ToBf16`, since the extension only supports round to closest even. The code that calls `convertFp32ToBf16` uses round to closest even by default, so that's fine.
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