Skip to content

Commit

Permalink
Intrinsic for example subincacc instruction
Browse files Browse the repository at this point in the history
Definition and test case for subincacc. Partially addresses #67 and #68
  • Loading branch information
thomasgoodfellow committed Sep 13, 2024
1 parent 64eb705 commit 7c4f4cd
Show file tree
Hide file tree
Showing 7 changed files with 34 additions and 11 deletions.
13 changes: 13 additions & 0 deletions examples/cfg/example/intrinsics.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,13 @@
---
intrinsics:
intrinsics:
- args:
- arg_name: rd
arg_type: i32
- arg_name: rs1
arg_type: i32
- arg_name: rs2
arg_type: i32
instr_name: xexample.subincacc
intrinsic_name: subincacc
ret_type: i32
1 change: 1 addition & 0 deletions examples/demo.py
Original file line number Diff line number Diff line change
Expand Up @@ -94,6 +94,7 @@
EXAMPLES_DIR / "cfg" / "tests.yml",
EXAMPLES_DIR / "cfg" / "passes.yml",
EXAMPLES_DIR / "cfg" / "git.yml",
EXAMPLES_DIR / "cfg" / "example/intrinsics.yml",
]
seal5_flow.load(cfg_files, verbose=VERBOSE, overwrite=False)

Expand Down
10 changes: 10 additions & 0 deletions examples/tests/example/test_subincacc.c
Original file line number Diff line number Diff line change
Expand Up @@ -23,3 +23,13 @@ __attribute__((naked)) void test_subincacc() {
// CHECK: ab ba b5 51 xexample.subincacc x21, x11, x27
asm("xexample.subincacc x21, x11, x27");
}

void test_intrinsic() {
// CHECK: <test_intrinsic>
int a = 3;
int b = 7;
int c = 4;
// Can't rely upon specific registers being used but at least instruction should have been used
// CHECK: example.subincacc
c = __builtin_xexample_subincacc(a, b, c);
}
2 changes: 1 addition & 1 deletion seal5/backends/riscv_instr_info/writer.py
Original file line number Diff line number Diff line change
Expand Up @@ -241,7 +241,7 @@ def main():
parser.add_argument("--metrics", default=None, help="Output metrics to file")
parser.add_argument("--index", default=None, help="Output index to file")
parser.add_argument("--ext", type=str, default="td", help="Default file extension (if using --splitted)")
parser.add_argument("--add-intrinsics", type=bool, default=True, action=argparse.BooleanOptionalAction, help="Include patterns for intrinsic functions")
parser.add_argument("--no-add-intrinsics", dest='add_intrinsics', default=True, action='store_false', help="Suppress patterns for intrinsic functions")

Check failure on line 244 in seal5/backends/riscv_instr_info/writer.py

View workflow job for this annotation

GitHub Actions / Flake8

seal5/backends/riscv_instr_info/writer.py#L244

Line too long (155 > 120 characters) (E501)
args = parser.parse_args()

# initialize logging
Expand Down
15 changes: 8 additions & 7 deletions seal5/backends/riscv_intrinsics/writer.py
Original file line number Diff line number Diff line change
Expand Up @@ -47,9 +47,8 @@ def build_target(arch: str, intrinsic: IntrinsicDefn):

def ir_type_to_pattern(ir_type: str):

Check failure on line 48 in seal5/backends/riscv_intrinsics/writer.py

View workflow job for this annotation

GitHub Actions / Flake8

seal5/backends/riscv_intrinsics/writer.py#L48

Expected 2 blank lines, found 1 (E302)
# needs fleshing out with all likely types
match ir_type:
case 'i32':
return 'llvm_i32_ty'
if ir_type == 'i32':
return 'llvm_i32_ty'
raise NotImplementedError(f'Unhandled ir_type "{ir_type}"')

def build_attr(arch: str, intrinsic: IntrinsicDefn):

Check failure on line 54 in seal5/backends/riscv_intrinsics/writer.py

View workflow job for this annotation

GitHub Actions / Flake8

seal5/backends/riscv_intrinsics/writer.py#L54

Expected 2 blank lines, found 1 (E302)
Expand Down Expand Up @@ -77,9 +76,11 @@ def build_emit(arch: str, intrinsic: IntrinsicDefn):

@dataclass
class PatchFrag:
patchee: str
tag: str
contents: str = ""
"""Pairs patch contents to location to apply it"""
patchee: str
tag: str
contents: str = ""


def main():
"""Main app entrypoint."""
Expand Down Expand Up @@ -113,7 +114,7 @@ def main():
else:
out_path = pathlib.Path(args.output)

logger.info("loading models")
logger.info("intrinsics/writer - loading models")
if not is_seal5_model:
raise NotImplementedError

Expand Down
1 change: 1 addition & 0 deletions seal5/flow.py
Original file line number Diff line number Diff line change
Expand Up @@ -81,6 +81,7 @@
# ("riscv_instr_formats", passes.gen_riscv_instr_formats_patch, {}),
("riscv_register_info", passes.gen_riscv_register_info_patch, {}),
("riscv_instr_info", passes.gen_riscv_instr_info_patch, {}),
("riscv_intrinsics", passes.gen_riscv_intrinsics, {}),
# subtarget_tests
# register_types
# operand_types
Expand Down
3 changes: 0 additions & 3 deletions seal5/pass_list.py
Original file line number Diff line number Diff line change
Expand Up @@ -1076,7 +1076,6 @@ def gen_riscv_isa_info_patch(
print_func=logger.info if verbose else logger.debug,
live=True,
)
# breakpoint()
if gen_index_file:
if index_file.is_file():
patch_name = f"riscv_isa_info_{input_file.stem}"
Expand Down Expand Up @@ -1138,7 +1137,6 @@ def gen_riscv_intrinsics(
print_func=logger.info if verbose else logger.debug,
live=True,
)
# breakpoint()
if gen_index_file:
if index_file.is_file():
patch_base = f"riscv_intrinsics_target_{input_file.stem}"
Expand Down Expand Up @@ -1166,7 +1164,6 @@ def gen_riscv_instr_info_patch(
**_kwargs,
):
# assert not split, "TODO"
# breakpoint()
assert split, "TODO"
# formats = True
gen_metrics_file = True
Expand Down

0 comments on commit 7c4f4cd

Please sign in to comment.