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Removed explicit mfence in atomic_fence on Windows.
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The necessary instructions according to the memory order argument
should already be generated by std::atomic_thread_fence.

Signed-off-by: Andrey Semashev <andrey.semashev@gmail.com>
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Lastique committed Nov 25, 2021
1 parent 3e87c25 commit de51c60
Showing 1 changed file with 0 additions and 14 deletions.
14 changes: 0 additions & 14 deletions include/oneapi/tbb/detail/_machine.h
Original file line number Diff line number Diff line change
Expand Up @@ -79,10 +79,6 @@ using std::this_thread::yield;
// atomic_fence implementation
//--------------------------------------------------------------------------------------------------

#if _MSC_VER && (__TBB_x86_64 || __TBB_x86_32)
#pragma intrinsic(_mm_mfence)
#endif

static inline void atomic_fence(std::memory_order order) {
#if (__TBB_x86_64 || __TBB_x86_32) && defined(__GNUC__) && __GNUC__ < 11
if (order == std::memory_order_seq_cst)
Expand All @@ -95,16 +91,6 @@ static inline void atomic_fence(std::memory_order order) {
__asm__ __volatile__ ("" ::: "memory");
}
#else
#if _MSC_VER && (__TBB_x86_64 || __TBB_x86_32)
if (order == std::memory_order_seq_cst ||
order == std::memory_order_acq_rel ||
order == std::memory_order_acquire ||
order == std::memory_order_release )
{
_mm_mfence();
return;
}
#endif /*_MSC_VER && (__TBB_x86_64 || __TBB_x86_32)*/
std::atomic_thread_fence(order);
#endif
}
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