[ptr-compr][arm64] Update pointer compression arm64's implementation

Since kTaggedSize got shrinked and we are actually compressing
the pointers (as oppposed to zeroing their upper bits),
we need to update the arm64 codebase to accommodate this change.

Cq-Include-Trybots: luci.v8.try:v8_linux64_arm64_pointer_compression_rel_ng
Bug: v8:7703
Change-Id: I890f3ab8c046f47232e80f85830f9ae8f4dbced4
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1499498
Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org>
Reviewed-by: Igor Sheludko <ishell@chromium.org>
Reviewed-by: Ross McIlroy <rmcilroy@chromium.org>
Reviewed-by: Clemens Hammacher <clemensh@chromium.org>
Cr-Commit-Position: refs/heads/master@{#60172}

src/arm64/macro-assembler-arm64-inl.h

@@ -1060,7 +1060,11 @@ void TurboAssembler::SmiUntag(Register dst, const MemOperand& src) {
  }
  } else {
  DCHECK(SmiValuesAre31Bits());
+#ifdef V8_COMPRESS_POINTERS
+ Ldrsw(dst, src);
+#else
  Ldr(dst, src);
+#endif
  SmiUntag(dst);
  }
 }

src/arm64/macro-assembler-arm64.cc

@@ -2813,11 +2813,7 @@ void TurboAssembler::StoreTaggedField(const Register& value,
  const MemOperand& dst_field_operand) {
 #ifdef V8_COMPRESS_POINTERS
  RecordComment("[ StoreTagged");
- // Use temporary register to zero out and don't trash value register
- UseScratchRegisterScope temps(this);
- Register compressed_value = temps.AcquireX();
- Uxtw(compressed_value, value);
- Str(compressed_value, dst_field_operand);
+ Str(value.W(), dst_field_operand);
  RecordComment("]");
 #else
  Str(value, dst_field_operand);
@@ -2827,27 +2823,23 @@ void TurboAssembler::StoreTaggedField(const Register& value,
 void TurboAssembler::DecompressTaggedSigned(const Register& destination,
  const MemOperand& field_operand) {
  RecordComment("[ DecompressTaggedSigned");
- // TODO(solanes): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
- Ldr(destination, field_operand);
- Sxtw(destination, destination);
+ Ldrsw(destination, field_operand);
  RecordComment("]");
 }
 
 void TurboAssembler::DecompressTaggedPointer(const Register& destination,
  const MemOperand& field_operand) {
  RecordComment("[ DecompressTaggedPointer");
- // TODO(solanes): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
- Ldr(destination, field_operand);
- Add(destination, kRootRegister, Operand(destination, SXTW));
+ Ldrsw(destination, field_operand);
+ Add(destination, kRootRegister, destination);
  RecordComment("]");
 }
 
 void TurboAssembler::DecompressAnyTagged(const Register& destination,
  const MemOperand& field_operand) {
  RecordComment("[ DecompressAnyTagged");
  UseScratchRegisterScope temps(this);
- // TODO(solanes): use Ldrsw instead of Ldr,SXTW once kTaggedSize is shrinked
- Ldr(destination, field_operand);
+ Ldrsw(destination, field_operand);
  // Branchlessly compute |masked_root|:
  // masked_root = HAS_SMI_TAG(destination) ? 0 : kRootRegister;
  STATIC_ASSERT((kSmiTagSize == 1) && (kSmiTag == 0));
@@ -2857,7 +2849,7 @@ void TurboAssembler::DecompressAnyTagged(const Register& destination,
  And(masked_root, masked_root, kRootRegister);
  // Now this add operation will either leave the value unchanged if it is a smi
  // or add the isolate root if it is a heap object.
- Add(destination, masked_root, Operand(destination, SXTW));
+ Add(destination, masked_root, destination);
  RecordComment("]");
 }
 

src/builtins/arm64/builtins-arm64.cc

@@ -2555,7 +2555,7 @@ void Generate_PushBoundArguments(MacroAssembler* masm) {
  __ SlotAddress(copy_to, argc);
  __ Add(argc, argc,
  bound_argc); // Update argc to include bound arguments.
- __ Lsl(counter, bound_argc, kSystemPointerSizeLog2);
+ __ Lsl(counter, bound_argc, kTaggedSizeLog2);
  __ Bind(&loop);
  __ Sub(counter, counter, kTaggedSize);
  __ LoadAnyTaggedField(scratch, MemOperand(bound_argv, counter));

src/wasm/baseline/arm64/liftoff-assembler-arm64.h

@@ -206,9 +206,10 @@ void LiftoffAssembler::LoadTaggedPointer(Register dst, Register src_addr,
  Register offset_reg,
  uint32_t offset_imm,
  LiftoffRegList pinned) {
- STATIC_ASSERT(kTaggedSize == kInt64Size);
- Load(LiftoffRegister(dst), src_addr, offset_reg, offset_imm,
- LoadType::kI64Load, pinned);
+ UseScratchRegisterScope temps(this);
+ MemOperand src_op =
+ liftoff::GetMemOp(this, &temps, src_addr, offset_reg, offset_imm);
+ LoadTaggedPointerField(dst, src_op);
 }
 
 void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,