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Basic verification debugging functionality #863

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merged 41 commits into from
Sep 1, 2024

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marcoeilers
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This PR enables basic support for verification debugging in Silicon (using the --enableDebugging command line flag), implemented by @AndreaKe in her practical work project, and adapted to Silicon changes and extended or improved in various small ways by me.
It depends on Silver PR viperproject/silver#810.

There are two major changes:

  • When debugging is enabled, Silicon tracks all its assumptions, branch conditions, and assertions not only in the form of Silicon-internal Terms, but also the new DebugExprs, which a) group assumptions by their origin and b) contain either a textual description or a Viper-level Expr for each assumption etc. As a result, the current state with all assumptions can be displayed to the user in a way that refers to Silicon-internal concepts as little as possible and makes sense on the Viper level.
  • The SiliconDebugger is added, which enables debugging verification errors by locally and interactively assuming or asserting expressions, dropping assumptions, switching SMT solvers or changing solver options. For now, this happens only via a command line interface.

@marcoeilers marcoeilers merged commit 9f20584 into master Sep 1, 2024
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marcoeilers added a commit that referenced this pull request Sep 26, 2024
marcoeilers added a commit that referenced this pull request Sep 26, 2024
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