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[Kernel] Add GPU architecture guards to the CUTLASS w8a8 kernels to reduce binary size #5157
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This seems reasonable to me (as in not too bad of a way to achieve this), is this in a land-able state given the passing checks? |
It's in a landable state. I want to measure the final size reduction for the wheel file when compiling for all CUDA ARCHS before marking it ready for review. I started to do this Friday but ran into some very long compile times edit: was in a landable state -- there will likely be merge conflicts now that #5144 has landed |
Co-authored-by: Cody Yu <hao.yu.cody@gmail.com>
…educe binary size (vllm-project#5157) Co-authored-by: Cody Yu <hao.yu.cody@gmail.com>
…educe binary size (vllm-project#5157) Co-authored-by: Cody Yu <hao.yu.cody@gmail.com>
…educe binary size (vllm-project#5157) Co-authored-by: Cody Yu <hao.yu.cody@gmail.com>
…educe binary size (vllm-project#5157) Co-authored-by: Cody Yu <hao.yu.cody@gmail.com>
…educe binary size (vllm-project#5157) Co-authored-by: Cody Yu <hao.yu.cody@gmail.com>
…educe binary size (vllm-project#5157) Co-authored-by: Cody Yu <hao.yu.cody@gmail.com>
…educe binary size (vllm-project#5157) Co-authored-by: Cody Yu <hao.yu.cody@gmail.com>
This PR wraps the CUTLASS kernel definitions in order to guard against compilation on architectures that will never use a particular kernel. The purpose of this is to reduce the size of the compiled binary. Each CUTLASS kernel is defined and optimized for specific GPU architectures, but each kernel is compiled for every arch defined in
CUDA_SUPPORTED_ARCHS
.The normal way to deal with this is to look at the macro
__CUDA_ARCH__
. This macro is defined in the device-specific code but not on the host. All of our code runs on the host, so this PR uses these wrappers to "reach into" the device code to conditionally define the code.Results:
If I build
and then run the following (the strip is because I forgot to build in release mode):
main
this PR:
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