This release includes the following major changes and fixes:
- New vx_spawn_threads kernel launch API supporting 3D task-partitioning.
- Using the ../configure script without parameters to update the build repository during development.
- Support for the ZICOND RISC-V extension for branchless conditionals.
- OpenCL compiler migration from warp-level to thread-level scheduling.
- Support for OpenCL's just-in-time compilation.
- Support for OpenCL's 64-bit kernel.
- Support for Vortex runtime dynamic loading for driver-specific implementations simplifies linking for Vortex applications.
- Updated README instructions.
- New Xilinx FPGA setup documentation.
- Enabled Full logic synthesis test using Yosys.
- Added cache support for hierarchical flush.
- Added cache support for write-back mode with configurable dirty bytes.
- RTL scoreboard and operand speed optimization.
- Support for Ramulator 2.0 with HBM memory configuration.
- Migration to Verilator 5.0.
- Migration to LLVM 18.0.
- New Stencil3D regression test.
- Fixed Xilinx FPGA synthesis for cores with more than 256 threads.
- Updated Centos 7.9 toolchain
- Migration from Travis CI to GitHub CI workflow.