| Project Silent Willow | my-computer-details-cli |
| #FitDevs |
Hey there, I'm Mark, a hardware design engineer in the making, currently working on low-level programming and FPGA circuits, in preperation for university. So far, I've made an attempt at developing an OS kernel from scratch, though I found it quite difficult to do without prior knowledge about how things are executed in an OS, hence why I'm now working with Verilog on tau, and why development on DevOS has temporarily stopped.
Here's some projects I've completed/am currently working on:
- Project Silent Willow
- my-computer-details
- Regional Rail Tracker (private, due to API key integration)
- tau-w (private, due to closed-source nature of the project)