Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

dialects: Add LLVM InlineAsm op #2203

Merged
merged 5 commits into from
Feb 22, 2024
Merged

dialects: Add LLVM InlineAsm op #2203

Show file tree
Hide file tree
Changes from 4 commits
Commits
Show all changes
5 commits
Select commit Hold shift + click to select a range
949013c
Add LLVM InlineAsmOp
JosseVanDelm Feb 21, 2024
1978714
Add more comments
JosseVanDelm Feb 21, 2024
3cd2cd2
Add constructor for LLVM inline_asm op
JosseVanDelm Feb 21, 2024
1e87d85
Add interop test
JosseVanDelm Feb 21, 2024
c8344e5
Remove comment and add constraint to asm_dialect enum
JosseVanDelm Feb 22, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
16 changes: 16 additions & 0 deletions tests/filecheck/dialects/llvm/inline_asm.mlir
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,16 @@
// RUN: XDSL_ROUNDTRIP

%0 = "test.op"() : () -> i32
%1 = "test.op"() : () -> i32
"llvm.inline_asm"(%0, %1) <{asm_string = "csrw $0, $1", constraints = "i, r"}> {has_side_effect} : (i32, i32) -> ()

%2 = "test.op"() : () -> vector<8xf32>
%3 = "test.op"() : () -> vector<8xf32>
%4 = "llvm.inline_asm"(%2, %3) <{asm_dialect = 1 : i64, asm_string = "vaddps $0, $1, $2", constraints = "=x,x,x"}> : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>

// CHECK: %0 = "test.op"() : () -> i32
// CHECK-NEXT: 1 = "test.op"() : () -> i32
// CHECK-NEXT: "llvm.inline_asm"(%0, %1) <{"asm_string" = "csrw $0, $1", "constraints" = "i, r"}> {"has_side_effect"} : (i32, i32) -> ()
// CHECK-NEXT: %2 = "test.op"() : () -> vector<8xf32>
// CHECK-NEXT: %3 = "test.op"() : () -> vector<8xf32>
// CHECK-NEXT: %4 = "llvm.inline_asm"(%2, %3) <{"asm_dialect" = 1 : i64, "asm_string" = "vaddps $0, $1, $2", "constraints" = "=x,x,x"}> : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
16 changes: 16 additions & 0 deletions tests/filecheck/mlir-conversion/with-mlir/dialects/llvm/inline_asm.mlir
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,16 @@
/// RUN: mlir-opt %s --mlir-print-op-generic | xdsl-opt --print-op-generic | filecheck %s

%0 = "test.op"() : () -> i32
%1 = "test.op"() : () -> i32
"llvm.inline_asm"(%0, %1) <{asm_string = "csrw $0, $1", constraints = "i, r"}> {has_side_effect} : (i32, i32) -> ()

%2 = "test.op"() : () -> vector<8xf32>
%3 = "test.op"() : () -> vector<8xf32>
%4 = "llvm.inline_asm"(%2, %3) <{asm_dialect = 1 : i64, asm_string = "vaddps $0, $1, $2", constraints = "=x,x,x"}> : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>

// CHECK: %0 = "test.op"() : () -> i32
// CHECK-NEXT: 1 = "test.op"() : () -> i32
// CHECK-NEXT: "llvm.inline_asm"(%0, %1) <{"asm_string" = "csrw $0, $1", "constraints" = "i, r"}> {"has_side_effect"} : (i32, i32) -> ()
// CHECK-NEXT: %2 = "test.op"() : () -> vector<8xf32>
// CHECK-NEXT: %3 = "test.op"() : () -> vector<8xf32>
// CHECK-NEXT: %4 = "llvm.inline_asm"(%2, %3) <{"asm_dialect" = 1 : i64, "asm_string" = "vaddps $0, $1, $2", "constraints" = "=x,x,x"}> : (vector<8xf32>, vector<8xf32>) -> vector<8xf32>
56 changes: 56 additions & 0 deletions xdsl/dialects/llvm.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -712,6 +712,61 @@ def __init__(self, input: SSAValue | Operation, ptr_type: Attribute | None = Non
super().__init__(operands=[input], result_types=[ptr_type])


@irdl_op_definition
class InlineAsmOp(IRDLOperation):
"""
https://mlir.llvm.org/docs/Dialects/LLVM/#llvminline_asm-llvminlineasmop

To see what each field means, have a look at:
https://llvm.org/docs/LangRef.html#inline-assembler-expressions
"""

name = "llvm.inline_asm"

# operands_, because is already defined?
superlopuh marked this conversation as resolved.
Show resolved Hide resolved
operands_: VarOperand = var_operand_def()

res: OptOpResult = opt_result_def()

# note: in MLIR upstream this is implemented as AsmDialectAttr;
# which is an instantiation of an LLVM_EnumAttr
# 0 for AT&T inline assembly dialect
# 1 for Intel inline assembly dialect
# In this context dialect does not refer to an MLIR dialect
asm_dialect = opt_prop_def(IntegerAttr[IntegerType])

asm_string: StringAttr = prop_def(StringAttr)
constraints: StringAttr = prop_def(StringAttr)
has_side_effects: UnitAttr | None = opt_prop_def(UnitAttr)
is_align_stack: UnitAttr | None = opt_prop_def(UnitAttr)

def __init__(
self,
operands_: list[SSAValue | Operation],
res_types: list[Attribute],
asm_string: str,
constraints: str,
asm_dialect: int = 0,
has_side_effects: bool = False,
is_align_stack: bool = False,
):
props: dict[str, Attribute] = {
"asm_string": StringAttr(asm_string),
"constraints": StringAttr(constraints),
"asm_dialect": IntegerAttr.from_int_and_width(asm_dialect, 64),
}
if has_side_effects:
props["has_side_effects"] = UnitAttr()
if is_align_stack:
props["is_align_stack"] = UnitAttr()

Comment on lines +755 to +761
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Suggested change
"asm_dialect": IntegerAttr.from_int_and_width(asm_dialect, 64),
}
if has_side_effects:
props["has_side_effects"] = UnitAttr()
if is_align_stack:
props["is_align_stack"] = UnitAttr()
"asm_dialect": IntegerAttr.from_int_and_width(asm_dialect, 64),
"has_side_effects": UnitAttr() if has_side_effects else None,
"is_align_stack": UnitAttr() if is_align_stack else None,
}

Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

can then probably move the dict literal into the super init call

Copy link
Collaborator Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Pyright throws an error if I do that, cause props is not allowed to have a None as value in the dictionary.
I've seen some other shorthands here, but just like the poster here I prefer the original code:
https://stackoverflow.com/questions/14263872/only-add-to-a-dict-if-a-condition-is-met

Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Wait a second, properties can't be missing, can you please check that in MLIR these are properties and not attributes by printing the generic syntax?

super().__init__(
operands=operands_,
properties=props,
result_types=res_types,
)


@irdl_op_definition
class PtrToIntOp(IRDLOperation):
name = "llvm.ptrtoint"
Expand Down Expand Up @@ -1271,6 +1326,7 @@ def __init__(
AShrOp,
ExtractValueOp,
InsertValueOp,
InlineAsmOp,
UndefOp,
AllocaOp,
GEPOp,
Expand Down
Loading