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{ | ||
"cells": [ | ||
{ | ||
"cell_type": "markdown", | ||
"metadata": {}, | ||
"source": [ | ||
"# DMAs\n", | ||
"\n", | ||
"DMAs:直接内存访问(direct memory accesses)\n", | ||
"\n", | ||
"参考:[DMAs](https://en.wikipedia.org/wiki/Direct_memory_access)" | ||
] | ||
} | ||
], | ||
"metadata": { | ||
"language_info": { | ||
"name": "python" | ||
} | ||
}, | ||
"nbformat": 4, | ||
"nbformat_minor": 2 | ||
} |
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{ | ||
"cells": [ | ||
{ | ||
"cell_type": "markdown", | ||
"metadata": {}, | ||
"source": [ | ||
"# MACs\n", | ||
"\n", | ||
"参考:[MACs](https://en.wikipedia.org/wiki/Multiply%E2%80%93accumulate_operation)\n", | ||
"\n", | ||
"MACs: mutiply-accumulate operations \n", | ||
"\n", | ||
"在计算中,特别是在数字信号处理中,乘法累加(MAC)或乘法加法(MAD)运算是常见的步骤,用于计算两个数的乘积并将该乘积添加到累加器中。执行此操作的硬件单元称为乘法累加器(MAC 单元);该操作本身也经常被称为 MAC 或 MAD 操作。MAC 操作修改累加器 `a`:\n", | ||
"\n", | ||
"$$\n", | ||
"a \\leftarrow a + (b \\times c)\n", | ||
"$$\n", | ||
"\n", | ||
"当使用浮点数时,可能会执行两次舍入(在许多 [DSPs](https://en.wikipedia.org/wiki/Digital_signal_processors) 中是典型的),或只执行一次舍入。当只执行一次舍入时,它被称为融合乘法加法(FMA)或融合乘法累加(FMAC)。现代计算机可能包含专用的 MAC,由组合逻辑实现的乘法器、加法器和存储结果的累加器寄存器组成。寄存器的输出反馈到加法器的输入端,因此每个时钟周期,乘法器的输出被添加到寄存器中。组合乘法器需要大量的逻辑,但可以比早期计算机的典型移位和相加方法更快地计算乘积。" | ||
] | ||
} | ||
], | ||
"metadata": { | ||
"language_info": { | ||
"name": "python" | ||
} | ||
}, | ||
"nbformat": 4, | ||
"nbformat_minor": 2 | ||
} |
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# 复杂度 | ||
|
||
```{toctree} | ||
FLOPs | ||
MACs | ||
DMAs | ||
``` | ||
|
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# 设计 | ||
|
||
```{toctree} | ||
intro | ||
intro-old | ||
complexity/index | ||
models/index | ||
``` |
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