Initial commit

Makefile

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+# Assume we are in Ghidra/Processors/subdir
+GHIDRA_DIR ?= $(shell readlink -f $(CURDIR)/../../..)
+SLEIGH ?= $(GHIDRA_DIR)/support/sleigh
+PERL ?= perl
+
+# -x                turns on parser debugging (SleighCompile)
+# -u                print warnings for unnecessary pcode instructions (SleighCompile)
+# -l                report pattern conflicts (SleighCompile)
+# -n                print warnings for all NOP constructors (SleighCompile)
+# -t                print warnings for dead temporaries (SleighCompile)
+# -e                enforce use of 'local' keyword for temporaries (SleighCompile)
+# -f                print warnings for unused token fields (SleighCompile)
+SLEIGH_ARGS := -x -u -l -n -t -e -f
+
+LANGDIR := data/languages
+
+# Must start with slaspec.
+SLA_SRCS := $(LANGDIR)/xtensa.slaspec $(wildcard $(LANGDIR)/xtensa*.sinc)
+SLA := $(LANGDIR)/xtensa.sla
+
+MANDIR := data/manuals
+IDX := $(MANDIR)/xtensa.idx
+
+# Targets
+
+.PHONY: all
+all: check-ghidra $(SLA) $(IDX)
+
+.PHONY: check-ghidra
+check-ghidra:
+	@if [ ! -d $(GHIDRA_DIR)/Ghidra ]; then \
+		echo "Your Ghidra installation directory could not be determined." >&2; \
+		echo "Please re-run make with GHIDRA_DIR set to the root of your Ghidra installation." >&2; \
+		exit 1; \
+	fi
+
+$(SLA): $(SLA_SRCS)
+	$(SLEIGH) $(SLEIGH_ARGS) $< $@
+
+$(IDX): $(SLA_SRCS)
+	mkdir -p $(MANDIR)
+	$(PERL) mkindex.pl $^ > $@
+
+release.zip: clean all
+	mkdir -p release/Xtensa/$(LANGDIR)
+	cp -r $(LANGDIR)/xtensa* release/Xtensa/$(LANGDIR)
+	mkdir -p release/Xtensa/$(MANDIR)
+	cp -r $(MANDIR)/*.idx release/Xtensa/$(MANDIR)
+	cp Module.manifest release/Xtensa
+	cd release && zip -r ../$@ .
+
+.PHONY: clean
+clean:
+	rm -rf $(SLA) $(IDX) release release.zip

README.md

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+# Tensilica Xtensa module for Ghidra
+
+![Screenshot](/screenshot.png?raw=true)
+
+# Installation
+
+```
+$ cd ghidra_9.0.X/Ghidra/Processors
+$ git clone https://github.com/yath/ghidra-xtensa Xtensa
+$ cd Xtensa
+$ make
+$
+```
+
+Or download a pre-built release and unzip it to `Ghidra/Processors`.
+
+# Bugs
+
+* Some calculations are wrong, causing Ghidra to miscalculate a jump target.
+* Probably a lot of others in instructions I did not yet happen to encouter. Pull requests
+  appreciated.
+
+# TODO
+
+* An `.opinion` file for autodetection
+* Windowed Register Option
+* MAC16 Option
+* Loop Option
+* ESP8266/ESP32 image loaders?

data/languages/xtensa.cspec

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+<?xml version="1.0" encoding="UTF-8"?>
+
+<compiler_spec>
+  <data_organization>
+     <absolute_max_alignment value="0" />
+     <machine_alignment value="2" />
+     <default_alignment value="1" />
+     <default_pointer_alignment value="4" />
+     <pointer_size value="4" />
+     <wchar_size value="4" />
+     <short_size value="2" />
+     <integer_size value="4" />
+     <long_size value="4" />
+     <long_long_size value="8" />
+     <float_size value="4" />
+     <double_size value="8" />
+     <long_double_size value="8" />
+     <size_alignment_map>
+          <entry size="1" alignment="1" />
+          <entry size="2" alignment="2" />
+          <entry size="4" alignment="4" />
+          <entry size="8" alignment="8" />
+     </size_alignment_map>
+  </data_organization>
+  <global>
+    <range space="ram"/>
+  </global>
+  <stackpointer register="a1" space="ram"/>
+  <default_proto>
+    <prototype name="__stdcall" extrapop="0" stackshift="0">
+      <input>
+        <pentry minsize="1" maxsize="4" extension="inttype">
+          <register name="a2"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4" extension="inttype">
+          <register name="a3"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4" extension="inttype">
+          <register name="a4"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4" extension="inttype">
+          <register name="a5"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4" extension="inttype">
+          <register name="a6"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4" extension="inttype">
+          <register name="a7"/>
+        </pentry>
+        <pentry minsize="1" maxsize="500" align="4">
+          <addr offset="0" space="stack"/>
+        </pentry>
+      </input>
+      <output>
+        <pentry minsize="1" maxsize="4" extension="inttype">
+          <register name="a2"/>
+        </pentry>
+    </output>
+    <returnaddress>
+        <register name="a0"/>
+    </returnaddress>
+    <unaffected>
+      <register name="a0"/>
+      <register name="a1"/>
+      <register name="a8"/>
+      <register name="a9"/>
+      <register name="a10"/>
+      <register name="a11"/>
+      <register name="a12"/>
+      <register name="a13"/>
+      <register name="a14"/>
+      <register name="a15"/>
+    </unaffected>
+    </prototype>
+  </default_proto>
+</compiler_spec>

data/languages/xtensa.ldefs

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+<?xml version="1.0" encoding="UTF-8"?>
+
+<language_definitions>
+  <language processor="xtensa"
+            endian="little"
+            size="32"
+            variant="default"
+            version="1.0"
+            slafile="xtensa.sla"
+            processorspec="xtensa.pspec"
+            manualindexfile="../manuals/xtensa.idx"
+            id="Xtensa:LE:32:default">
+    <description>Tensilica Xtensa 32-bit little-endian</description>
+    <compiler name="default" spec="xtensa.cspec" id="default"/>
+  </language>
+</language_definitions>

data/languages/xtensa.pspec

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+<?xml version="1.0" encoding="UTF-8"?>
+
+<processor_spec>
+  <programcounter register="pc"/>
+</processor_spec>