LoBA Approximate Multiplier

Verilog implementation of LoBA (Leading One Bit) Approximate Multiplier [1].

This is an example design presented as a study case for the MAxPy Framework.

You can check a full description of this design at MAxPy's documentation page.

Reference

[1] Garg, B., Patel, S.K. & Dutt, S. LoBA: A Leading One Bit Based Imprecise Multiplier for Efficient Image Processing. J Electron Test 36, 429–437 (2020). https://doi.org/10.1007/s10836-020-05883-4