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drivers: sai: the 1st frame synchronization signal lost in slave side #490

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Raymond0225
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According the RM document, RT1170 58.3.3 (should be same for other MCU which has a similiar SAI IP):
"A valid frame sync is also ignored (slave mode) or not generated (master mode) for the first four bit clock cycles after enabling the transmitter or receiver."
but in fact, we found master side send out a valid frame sync at the 3rd bit clock cycles which cause this frame sync is ignored by the slave side and frame data lost.
To workaround this issue, bit clock is enabled before TE/RE.

@decsny
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decsny commented Dec 17, 2024

Has this change been submitted to the SDK ? All PRs to this repo that change SDK code need to be upstreamed to the SDK so that we don't need to keep repatching after updating to new SDKs (this repo is a "public downstream" of the "internal upstream" SDK)

@Raymond0225
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Has this change been submitted to the SDK ? All PRs to this repo that change SDK code need to be upstreamed to the SDK so that we don't need to keep repatching after updating to new SDKs (this repo is a "public downstream" of the "internal upstream" SDK)

I am submitting to internal upstream at the same time.

According the RM document, RT1170 58.3.3 (should be same for other MCU
which has a similiar SAI IP):
"A valid frame sync is also ignored (slave mode) or not generated (master
mode) for the first four bit clock cycles after enabling the transmitter
or receiver."
but in fact, we found master side send out a valid frame sync at the 3rd
bit clock cycles which cause this frame sync is ignored by the slave
side and frame data lost.
To workaround this issue, bit clock is enabled before TE/RE.

Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
@Raymond0225 Raymond0225 force-pushed the i2s_rx_1st_frame_sync branch from 429891d to a505c5b Compare December 19, 2024 22:38
@Raymond0225 Raymond0225 marked this pull request as draft December 20, 2024 16:56
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2 participants