hal: renesas: rz: Initial support for I2C

drivers/rz/CMakeLists.txt

@@ -28,3 +28,6 @@ zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_ADC
 
 zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_MHU
 	fsp/src/${SOC_SERIES_PREFIX}/r_mhu_ns/r_mhu_ns.c)
+
+zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_RIIC_MASTER
+	fsp/src/${SOC_SERIES_PREFIX}/r_riic_master/r_riic_master.c)

drivers/rz/fsp/inc/api/r_i2c_master_api.h

@@ -0,0 +1,215 @@
+/*
+* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
+*
+* SPDX-License-Identifier: BSD-3-Clause
+*/
+
+#ifndef R_I2C_MASTER_API_H
+#define R_I2C_MASTER_API_H
+
+/*******************************************************************************************************************//**
+ * @ingroup RENESAS_INTERFACES
+ * @defgroup I2C_MASTER_API I2C Master Interface
+ * @brief Interface for I2C master communication.
+ *
+ * @section I2C_MASTER_API_SUMMARY Summary
+ * The I2C master interface provides a common API for I2C HAL drivers. The I2C master interface supports:
+ *        - Interrupt driven transmit/receive processing
+ *        - Callback function support which can return an event code
+ *
+ * Implemented by:
+ * - @ref RIIC_MASTER
+ *
+ * @{
+ **********************************************************************************************************************/
+
+/***********************************************************************************************************************
+ * Includes
+ **********************************************************************************************************************/
+
+/* Register definitions, common services and error codes. */
+#include "bsp_api.h"
+#include "r_transfer_api.h"
+
+/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
+FSP_HEADER
+
+/**********************************************************************************************************************
+ * Macro definitions
+ **********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ * Typedef definitions
+ **********************************************************************************************************************/
+
+/** Communication speed options */
+typedef enum e_i2c_master_rate
+{
+    I2C_MASTER_RATE_STANDARD = 100000, ///< 100 kHz
+    I2C_MASTER_RATE_FAST     = 400000, ///< 400 kHz
+    I2C_MASTER_RATE_FASTPLUS = 1000000 ///< 1 MHz
+} i2c_master_rate_t;
+
+/** Addressing mode options */
+typedef enum e_i2c_master_addr_mode
+{
+    I2C_MASTER_ADDR_MODE_7BIT  = 1,    ///< Use 7-bit addressing mode
+    I2C_MASTER_ADDR_MODE_10BIT = 2,    ///< Use 10-bit addressing mode
+} i2c_master_addr_mode_t;
+
+/** Callback events */
+typedef enum e_i2c_master_event
+{
+    I2C_MASTER_EVENT_ABORTED     = 1,  ///< A transfer was aborted
+    I2C_MASTER_EVENT_RX_COMPLETE = 2,  ///< A receive operation was completed successfully
+    I2C_MASTER_EVENT_TX_COMPLETE = 3   ///< A transmit operation was completed successfully
+} i2c_master_event_t;
+
+/** I2C callback parameter definition */
+typedef struct st_i2c_master_callback_args
+{
+    void const       * p_context;      ///< Pointer to user-provided context
+    i2c_master_event_t event;          ///< Event code
+} i2c_master_callback_args_t;
+
+/** I2C status indicators */
+typedef struct st_i2c_master_status
+{
+    bool open;                         ///< True if driver is open
+} i2c_master_status_t;
+
+/** I2C configuration block */
+typedef struct st_i2c_master_cfg
+{
+    /** Generic configuration */
+    uint8_t                channel;                           ///< Identifier recognizable by implementation
+    i2c_master_rate_t      rate;                              ///< Device's maximum clock rate from enum i2c_rate_t
+    uint32_t               slave;                             ///< The address of the slave device
+    i2c_master_addr_mode_t addr_mode;                         ///< Indicates how slave fields should be interpreted
+    uint8_t                ipl;                               ///< Interrupt priority level. Same for RXI, TXI, TEI and ERI.
+    IRQn_Type              rxi_irq;                           ///< Receive IRQ number
+    IRQn_Type              txi_irq;                           ///< Transmit IRQ number
+    IRQn_Type              tei_irq;                           ///< Transmit end IRQ number
+    IRQn_Type              eri_irq;                           ///< Error IRQ number
+
+    /** DTC support */
+    transfer_instance_t const * p_transfer_tx;                ///< DTC instance for I2C transmit.Set to NULL if unused.
+    transfer_instance_t const * p_transfer_rx;                ///< DTC instance for I2C receive. Set to NULL if unused.
+
+    /** Parameters to control software behavior */
+    void (* p_callback)(i2c_master_callback_args_t * p_args); ///< Pointer to callback function
+    void const * p_context;                                   ///< Pointer to the user-provided context
+
+    /** Implementation-specific configuration */
+    void const * p_extend;                                    ///< Any configuration data needed by the hardware
+} i2c_master_cfg_t;
+
+/** I2C control block.  Allocate an instance specific control block to pass into the I2C API calls.
+ * @par Implemented as
+ * - iic_master_instance_ctrl_t
+ */
+typedef void i2c_master_ctrl_t;
+
+/** Interface definition for I2C access as master */
+typedef struct st_i2c_master_api
+{
+    /** Opens the I2C Master driver and initializes the hardware.
+     * @par Implemented as
+     * - @ref R_RIIC_MASTER_Open()
+     *
+     * @param[in] p_ctrl    Pointer to control block. Must be declared by user. Elements are set here.
+     * @param[in] p_cfg     Pointer to configuration structure.
+     */
+    fsp_err_t (* open)(i2c_master_ctrl_t * const p_ctrl, i2c_master_cfg_t const * const p_cfg);
+
+    /** Performs a read operation on an I2C Master device.
+     * @par Implemented as
+     * - @ref R_RIIC_MASTER_Read()
+     *
+     * @param[in] p_ctrl    Pointer to control block set in i2c_api_master_t::open call.
+     * @param[in] p_dest    Pointer to the location to store read data.
+     * @param[in] bytes     Number of bytes to read.
+     * @param[in] restart   Specify if the restart condition should be issued after reading.
+     */
+    fsp_err_t (* read)(i2c_master_ctrl_t * const p_ctrl, uint8_t * const p_dest, uint32_t const bytes,
+                       bool const restart);
+
+    /** Performs a write operation on an I2C Master device.
+     * @par Implemented as
+     * - @ref R_RIIC_MASTER_Write()
+     *
+     * @param[in] p_ctrl    Pointer to control block set in i2c_api_master_t::open call.
+     * @param[in] p_src     Pointer to the location to get write data from.
+     * @param[in] bytes     Number of bytes to write.
+     * @param[in] restart   Specify if the restart condition should be issued after writing.
+     */
+    fsp_err_t (* write)(i2c_master_ctrl_t * const p_ctrl, uint8_t * const p_src, uint32_t const bytes,
+                        bool const restart);
+
+    /** Performs a reset of the peripheral.
+     * @par Implemented as
+     * - @ref R_RIIC_MASTER_Abort()
+     *
+     * @param[in] p_ctrl    Pointer to control block set in i2c_api_master_t::open call.
+     */
+    fsp_err_t (* abort)(i2c_master_ctrl_t * const p_ctrl);
+
+    /** Sets address of the slave device without reconfiguring the bus.
+     * @par Implemented as
+     * - @ref R_RIIC_MASTER_SlaveAddressSet()
+     *
+     * @param[in] p_ctrl            Pointer to control block set in i2c_api_master_t::open call.
+     * @param[in] slave_address     Address of the slave device.
+     * @param[in] address_mode      Addressing mode.
+     */
+    fsp_err_t (* slaveAddressSet)(i2c_master_ctrl_t * const p_ctrl, uint32_t const slave,
+                                  i2c_master_addr_mode_t const addr_mode);
+
+    /**
+     * Specify callback function and optional context pointer and working memory pointer.
+     * @par Implemented as
+     * - @ref R_RIIC_MASTER_CallbackSet()
+     *
+     * @param[in]   p_ctrl                   Pointer to the RIIC Master control block.
+     * @param[in]   p_callback               Callback function
+     * @param[in]   p_context                Pointer to send to callback function
+     * @param[in]   p_working_memory         Pointer to volatile memory where callback structure can be allocated.
+     *                                       Callback arguments allocated here are only valid during the callback.
+     */
+    fsp_err_t (* callbackSet)(i2c_master_ctrl_t * const p_api_ctrl, void (* p_callback)(i2c_master_callback_args_t *),
+                              void const * const p_context, i2c_master_callback_args_t * const p_callback_memory);
+
+    /** Gets the status of the configured I2C device.
+     * @par Implemented as
+     * - @ref R_RIIC_MASTER_StatusGet()
+     *
+     * @param[in]   p_ctrl             Pointer to the RIIC Master control block.
+     * @param[out]  p_status           Pointer to store current status.
+     */
+    fsp_err_t (* statusGet)(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_status_t * p_status);
+
+    /** Closes the driver and releases the I2C Master device.
+     * @par Implemented as
+     * - @ref R_RIIC_MASTER_Close()
+     *
+     * @param[in] p_ctrl    Pointer to control block set in i2c_api_master_t::open call.
+     */
+    fsp_err_t (* close)(i2c_master_ctrl_t * const p_ctrl);
+} i2c_master_api_t;
+
+/** This structure encompasses everything that is needed to use an instance of this interface. */
+typedef struct st_i2c_master_instance
+{
+    i2c_master_ctrl_t      * p_ctrl;   ///< Pointer to the control structure for this instance
+    i2c_master_cfg_t const * p_cfg;    ///< Pointer to the configuration structure for this instance
+    i2c_master_api_t const * p_api;    ///< Pointer to the API structure for this instance
+} i2c_master_instance_t;
+
+/******************************************************************************************************************//**
+ * @} (end addtogroup I2C_MASTER_API)
+ *********************************************************************************************************************/
+
+/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
+FSP_FOOTER
+
+#endif

drivers/rz/fsp/inc/instances/rzg/r_riic_master.h

@@ -0,0 +1,146 @@
+/*
+* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
+*
+* SPDX-License-Identifier: BSD-3-Clause
+*/
+
+/*******************************************************************************************************************//**
+ * @addtogroup RIIC_MASTER
+ * @{
+ **********************************************************************************************************************/
+
+#ifndef R_RIIC_MASTER_H
+#define R_RIIC_MASTER_H
+
+#include "bsp_api.h"
+#include "r_riic_master_cfg.h"
+#include "r_i2c_master_api.h"
+
+/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
+FSP_HEADER
+
+/***********************************************************************************************************************
+ * Macro definitions
+ **********************************************************************************************************************/
+
+/***********************************************************************************************************************
+ * Typedef definitions
+ **********************************************************************************************************************/
+
+/** I2C Timeout mode parameter definition */
+typedef enum e_iic_master_timeout_mode
+{
+    IIC_MASTER_TIMEOUT_MODE_LONG  = 0, ///< Timeout Detection Time Select: Long Mode -> TMOS = 0
+    IIC_MASTER_TIMEOUT_MODE_SHORT = 1  ///< Timeout Detection Time Select: Short Mode -> TMOS = 1
+} iic_master_timeout_mode_t;
+
+typedef enum e_iic_master_timeout_scl_low
+{
+    IIC_MASTER_TIMEOUT_SCL_LOW_DISABLED = 0, ///< Timeout detection during SCL low disabled
+    IIC_MASTER_TIMEOUT_SCL_LOW_ENABLED  = 1  ///< Timeout detection during SCL low enabled
+} iic_master_timeout_scl_low_t;
+
+/** I2C clock settings */
+typedef struct iic_master_clock_settings
+{
+    uint8_t cks_value;                 ///< Internal Reference Clock Select
+    uint8_t brh_value;                 ///< High-level period of SCL clock
+    uint8_t brl_value;                 ///< Low-level period of SCL clock
+} iic_master_clock_settings_t;
+
+/** I2C control structure. DO NOT INITIALIZE. */
+typedef struct st_iic_master_instance_ctrl
+{
+    i2c_master_cfg_t const * p_cfg;                 // Pointer to the configuration structure
+    uint32_t                 slave;                 // The address of the slave device
+    i2c_master_addr_mode_t   addr_mode;             // Indicates how slave fields should be interpreted
+
+    uint32_t       open;                            // Flag to determine if the device is open
+    R_RIIC0_Type * p_reg;                           // Base register for this channel
+
+    /* Current transfer information. */
+    uint8_t * p_buff;                               // Holds the data associated with the transfer
+    uint32_t  total;                                // Holds the total number of data bytes to transfer
+    uint32_t  remain;                               // Tracks the remaining data bytes to transfer
+    uint32_t  loaded;                               // Tracks the number of data bytes written to the register
+
+    uint8_t addr_low;                               // Holds the last address byte to issue
+    uint8_t addr_high;                              // Holds the first address byte to issue in 10-bit mode
+    uint8_t addr_total;                             // Holds the total number of address bytes to transfer
+    uint8_t addr_remain;                            // Tracks the remaining address bytes to transfer
+    uint8_t addr_loaded;                            // Tracks the number of address bytes written to the register
+
+    volatile bool             read;                 // Holds the direction of the data byte transfer
+    volatile bool             restart;              // Holds whether or not the restart should be issued when done
+    volatile bool             err;                  // Tracks whether or not an error occurred during processing
+    volatile bool             restarted;            // Tracks whether or not a restart was issued during the previous transfer
+    volatile bool             dummy_read_completed; // Tracks whether the dummy read is performed
+    volatile bool             activation_on_rxi;    // Tracks whether the transfer is activated on RXI interrupt
+    volatile bool             activation_on_txi;    // Tracks whether the transfer is activated on TXI interrupt
+    volatile bool             address_restarted;    // Tracks whether the restart condition is send on 10 bit read
+    volatile bool             nack_before_stop;     // Tracks whether or not a reception of NACK before Stop condition detect
+
+    /* Pointer to callback and optional working memory */
+    void (* p_callback)(i2c_master_callback_args_t *);
+    i2c_master_callback_args_t * p_callback_memory;
+
+    /* Pointer to context to be passed into callback function */
+    void const * p_context;
+} iic_master_instance_ctrl_t;
+
+/** RIIC extended configuration */
+typedef struct st_riic_master_extended_cfg
+{
+    iic_master_timeout_mode_t    timeout_mode;    ///< Timeout Detection Time Select: Long Mode = 0 and Short Mode = 1.
+    iic_master_timeout_scl_low_t timeout_scl_low; ///< Allows timeouts to occur when SCL is held low.
+    iic_master_clock_settings_t  clock_settings;  ///< I2C Clock settings
+    uint8_t   noise_filter_stage;                 ///< Noise Filter Stage Selection
+    IRQn_Type naki_irq;                           ///< NACK IRQ Number
+    IRQn_Type sti_irq;                            ///< Start condition IRQ Number
+    IRQn_Type spi_irq;                            ///< Stop condition IRQ Number
+    IRQn_Type ali_irq;                            ///< Arbitration lost IRQ Number
+    IRQn_Type tmoi_irq;                           ///< Timeout IRQ Number
+} riic_master_extended_cfg_t;
+
+/**********************************************************************************************************************
+ * Exported global variables
+ **********************************************************************************************************************/
+
+/** @cond INC_HEADER_DEFS_SEC */
+/** Filled in Interface API structure for this Instance. */
+extern i2c_master_api_t const g_i2c_master_on_iic;
+
+/** @endcond */
+
+/***********************************************************************************************************************
+ * Public APIs
+ **********************************************************************************************************************/
+fsp_err_t R_RIIC_MASTER_Open(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t const * const p_cfg);
+
+fsp_err_t R_RIIC_MASTER_Read(i2c_master_ctrl_t * const p_api_ctrl,
+                             uint8_t * const           p_dest,
+                             uint32_t const            bytes,
+                             bool const                restart);
+fsp_err_t R_RIIC_MASTER_Write(i2c_master_ctrl_t * const p_api_ctrl,
+                              uint8_t * const           p_src,
+                              uint32_t const            bytes,
+                              bool const                restart);
+fsp_err_t R_RIIC_MASTER_Abort(i2c_master_ctrl_t * const p_api_ctrl);
+fsp_err_t R_RIIC_MASTER_SlaveAddressSet(i2c_master_ctrl_t * const    p_api_ctrl,
+                                        uint32_t const               slave,
+                                        i2c_master_addr_mode_t const addr_mode);
+fsp_err_t R_RIIC_MASTER_Close(i2c_master_ctrl_t * const p_api_ctrl);
+fsp_err_t R_RIIC_MASTER_CallbackSet(i2c_master_ctrl_t * const          p_api_ctrl,
+                                    void (                           * p_callback)(i2c_master_callback_args_t *),
+                                    void const * const                 p_context,
+                                    i2c_master_callback_args_t * const p_callback_memory);
+fsp_err_t R_RIIC_MASTER_StatusGet(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_status_t * p_status);
+
+/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
+FSP_FOOTER
+
+#endif                                 // R_RIIC_MASTER_H
+
+/*******************************************************************************************************************//**
+ * @} (end defgroup RIIC_MASTER)
+ **********************************************************************************************************************/