IMXRT1170 crashing during flash erase

[danielb-tkjcy3rq]

Hi All,

I have a multicore project running on a custom imxrt1170 board. The board has MT25QL128ABA1EW7 flash device. My firmware sometimes crashes when I am erasing the slot1 flash partition before firmware upgrade. I'm erasing the partition from the CM7 processor. I initially thought the issue could be because I was erasing the flash while running from it in XIP mode, but I checked the map file and the flash erase code (flash_mcux_flexspi_nor.c) is running from ITCM. Double checked by putting a breakpoint and checking the program counter.

The only workaround to the issue I've come up with was to keep the CM4 in reset before calling 'boot_erase_img_bank' and taking it out of reset after.
`

SRC->CTRL_M4CORE = SRC_CTRL_M4CORE_SW_RESET_MASK;
SRC->SCR &= ~SRC_SCR_BT_RELEASE_M4_MASK;
if (const auto result = boot_erase_img_bank(FIXED_PARTITION_ID(slot1_partition)))
{
   LOG_ERR("Failed to erase update bank: %d", result);
}

// Bring CM4 out of reset
SRC->SCR |= SRC_SCR_BT_RELEASE_M4_MASK;`

I'm not clear why this works as the CM4 is running entirely from RAM. I think the flash_flexspi_nor_erase disables global interrupts on the CM7 during the erase if we are in XIP mode. My only guess is that the CM4 is generating an interrupt and that's somehow that ends up trying to run code from flash.

When the issue occurs, my board just freezes and doesn't do any of it's normal operations. What's odd is that the HW watchdog doesn't kick in until after about 30 seconds even though the timeout is set to 500ms timeout. I'm using WDOG3 for the CM7 and WDOG4 for the CM4. I'm running zephyr 3.6.0.

Does anyone have an idea why I could be seeing this issue and why keeping the CM4 in reset seems to solve it?

Thank you!

[DerekSnell]

Hi @danielb-tkjcy3rq ,
From what you have shared, it does sound like the CM4 is accessing flash during the erase operation, which will cause problems. As you found when XIPing, the FlexSPI driver does lock IRQs during a flash erase/program operation. The driver jumps to RAM and waits there until the operation completes. It locks IRQs to prevent any XIP or flash reads during that operation. But with multiple cores, the app would also need to ensure other cores do not access the flash at that same time.

I realize the CM4 executes from RAM. But is it reading something from flash somewhere? It may not be executable code, a const struct in flash shared with the CM7 would cause issues. I think it would help to isolate what in the CM4 app causes the issue. For example, if you add a while(1) in the reset handler of the CM4, does the problem go away when the CM4 does not do much? If so, push that while(1) loop further back in your app to narrow down what causes the problem. Or comment out blocks of code to narrow it down.

It may also help to sync the apps in the two core. When the CM7 erases the flash, signal the CM4 to loop in RAM with IRQs locked, waiting for the flash operation to complete. I am not saying the CM4 app cannot execute in parallel, but it may help confirm the CM4 app is causing this during the flash operation.

Another option to debug, since the app crashes, you could debug the CM4 app to see what leads up to the crash. If a fault occurs in that core, the fault registers and core registers may show what the CM4 was trying to access and where in the code when the fault occurred. Or you could use a trace tool to review what code lead up to the crash.

Let us know what you find. Best regards

[danielb-tkjcy3rq]

Thank you Derek. I haven't yet had a chance to dig deeper as you suggested, but will report back once I've had a look at it (probably next week).

[karadagmuhammet]

Hi, @danielb-tkjcy3rq and @DerekSnell,
I am currently encountering the same problem. Erasing the flash on the M4 core causes a crash on the M7 core. After reviewing the errata sheet published by NXP, I could not find any information regarding this issue. Could you please share how you resolved this problem?

[danielb-tkjcy3rq]

Hi @karadagmuhammet,

I still have not found a better solution than keeping the CM4 in reset while doing the flash erase from the CM7. See code snippet below:

SRC->CTRL_M4CORE = SRC_CTRL_M4CORE_SW_RESET_MASK;
SRC->SCR &= ~SRC_SCR_BT_RELEASE_M4_MASK;
if (const auto result = boot_erase_img_bank(FIXED_PARTITION_ID(slot1_partition)))
{
   LOG_ERR("Failed to erase update bank: %d", result);
}

// Bring CM4 out of reset
SRC->SCR |= SRC_SCR_BT_RELEASE_M4_MASK;