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drivers: eth: sam-e70: revision B has more queues #12711

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@dgloeck dgloeck commented Jan 24, 2019

If we don't initialize all queues, the DMA engine gets stuck when trying to read a descriptor from NULL.

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aurel32 commented Jan 24, 2019

@dgloeck Thanks for the patch. Looking at it quickly it seems correct. That said I also have a rev B chip and for me the driver basically works with the exception of a few bugs as you know. What are the symptoms when the DMA engine try to read from a non initialized queue?

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dgloeck commented Jan 25, 2019

@aurel32, both HRESP and TFC are set in GMAC_TSR and no packets are sent. The GMAC_TBQB register still points to the first descriptor. No w1 field in that queue has been modified by the DMA engine. Reception works as expected.

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Please try to provide more detailed commit messages, to provide smooth intro into the topic even for folks not familiar with details of specific HW. If each of us don't do that, even an author of a patch won't be able to tell why it was done and whether it's done right enough after some time (e.g., in a year).

drivers: eth: sam-e70: revision B has more queues
If we don't initialize all queues, the DMA engine gets stuck when trying
to read a descriptor from NULL.

Can some concrete info be added, e.g. something like "Revision A has 2 queues, while B - 4. Use config var to pick up right number of queues to initialize." ?

@aurel32 aurel32 added the platform: Microchip SAM Microchip SAM Platform (formerly Atmel SAM) label Jan 26, 2019
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aurel32 commented Jan 31, 2019

@dgloeck @mnkp Now that the Atmel SAM E70 HAL has been updated to version 2.3.98, any opinion on how we should import the revision B. I see the following options:

  • Import both revisions A and B, and allow users to select the right version in Kconfig, ie adding more parts in soc/arm/atmel_sam/same70/Kconfig.soc
  • Import revision B over revision A and try to detect the revision at runtime like done in the patch proposed by @dgloeck.

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dgloeck commented Feb 4, 2019

I'd prefer to replace the rev A headers with the rev B headers.
@mnkp, shall I make a pull request?

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mnkp commented Feb 4, 2019

I spent some time looking at the issue and I much prefer the first option

  • Import both revisions A and B, and allow users to select the right version in Kconfig, ie adding more parts in soc/arm/atmel_sam/same70/Kconfig.soc

The second approach would make sense if we decided to drop support for A series. But I'm not convinced we should.

  • Import revision B over revision A and try to detect the revision at runtime like done in the patch proposed by @dgloeck.

If we have only one set of headers, those for B series, it won't be possible any more to find out what the differences between the two versions are. We can do a runtime check in gmac driver as this PR proposes, but the next person developing another driver is going to have a rough time. Accessing a non existing register may cause difficult to debug errors ranging from a hard fault to missing functionality. It's quite frustrating when the documentation claims that flipping a given bit does something and our device doesn't seem to care. If we keep header files separate any mishaps will simply cause a compile time error.

Also I find it somehow cleaner if we stick with official part names. Someone who has a B series device will expect to choose same70q21b as a part name and not same70q21. A person may wonder if B series is supported at all.

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pfalcon commented Feb 27, 2019

Ping guys, any progress/resolution here? The PR needs resolving conflicts.

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dgloeck commented Feb 27, 2019

I'm waiting for #13155 before I rewrite this PR.

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jwu1980 commented Mar 25, 2019

Hi, @dgloeck,

Do you still plan to merge this pull request?

Thanks.

Best,

Larry

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dgloeck commented Mar 26, 2019

@f7488405 Still waiting for #13155

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aurel32 commented May 8, 2019

@dgloeck FYI #13155 has just been merged.

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dgloeck commented May 13, 2019

I have rebase the changes. The number of queues initialized now depends on the soc selected (CONFIG_SOC_ATMEL_SAME70_REVB). The GMAC_QUEUE_NO macro has been renamed to GMAC_QUEUE_NUM as requested. A BUILD_ASSERT_MSG line checks that GMAC_QUEUE_NUM has the correct value in case Microchip releases another soc that can use the same driver. GMAC_QUEUE_NUM must remain a number that can be evaluated by the C preprocessor, so using ARRAY_SIZE there is not possible. I have also added a few more words to the commit message.

@mnkp mnkp added the bug The issue is a bug, or the PR is fixing a bug label May 14, 2019
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mnkp commented May 14, 2019

I took a liberty to mark this PR as a bugfix. I believe we should backport it to 1.14.

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As reported in #22890, we need this PR to get Ethernet working on ATSAME70 Rev. B SoC. Without this PR, Ethernet frames do not get transmitted.

@stephanosio stephanosio added the priority: medium Medium impact/importance bug label Feb 18, 2020
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Is there anything preventing this PR from getting merged?

@stephanosio stephanosio requested a review from pfalcon February 18, 2020 08:41
@stephanosio stephanosio added this to the v2.2.0 milestone Feb 18, 2020
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zephyrbot commented Feb 18, 2020

All checks passed.

Tip: The bot edits this comment instead of posting a new one, so you can check the comment's history to see earlier messages.

The first revision of the SAM E70 soc had three queues. The current
revision B has six queues. If we don't initialize all queues, the DMA
engine gets stuck when trying to read a descriptor from NULL. To enable
the initialization of the additional queues, the correct soc has to be
selected in the config options, f.ex. CONFIG_SOC_PART_NUMBER_SAME70Q21B
instead of CONFIG_SOC_PART_NUMBER_SAME70Q21.

Also rename GMAC_QUEUE_NO to GMAC_QUEUE_NUM as requested during review.

Signed-off-by: Daniel Glöckner <dg@emlix.com>
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Force pushing to rebase onto the latest master and fix checkpatch warning

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Superseded by #22961.

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area: Ethernet area: Networking bug The issue is a bug, or the PR is fixing a bug platform: Microchip SAM Microchip SAM Platform (formerly Atmel SAM) priority: medium Medium impact/importance bug
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