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Cortex-R Port Improvement for 2.2#19698

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stephanosio wants to merge 18 commits intozephyrproject-rtos:masterzephyrproject-rtos/zephyr:masterfrom stephanosio:cortex_r_improvementstephanosio/zephyr:cortex_r_improvementCopy head branch name to clipboard

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Commits on Nov 4, 2019

• arch: arm: Make PLATFORM_SPECIFIC_INIT available to all ARM variants.

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• arch: arm: Add Cortex-R floating point configuration support.

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• arch: Add Dual-redundant Core Lock-step (DCLS) configuration.

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• arch: arm: Rewrite Cortex-R reset vector function.

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• arch: arm: Reorganise ARM interrupt management routines.

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• arch: arm: Fix incorrect Cortex-R interrupt management logic.

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• arch: arm: Fix incorrect Cortex-R interrupt state control logic.

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• arch: arm: Optimise Cortex-R exception return function.

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• arch: arm: Add Cortex-R direct interrupt service routine support.

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• arch: arm: Allow selecting instruction set for C code compilation.

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• arch: arm: Add vectored interrupt support for Cortex-R.

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• soc: arm: xilinx_zynqmp: Relocate platform-specific initialisation.

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• isr_tables: Support hardware interrupt vector table-only configuration.

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• arch: arm: Make hardware IVT generation default on Cortex-R.

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Commits on Nov 5, 2019

• arch: arm: Refactor Cortex-R interrupt system.

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• soc: arm: xilinx_zynqmp: Use the refactored Cortex-R interrupt system.

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• arch: arm: Update Cortex-R port to use CMSIS-Core(R).

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• soc: arm: xilinx_zynqmp: Use CMSIS-Core(R).

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