arch: arm: Fix incorrect Cortex-R interrupt state control logic.

[stephanosio]

This commit fixes incorrect Cortex-R interrupt lock, unlock and state
check function implementations.

The issues can be summarised as follows:

1. The current implementation of 'z_arch_irq_lock' returns the value
   of CPSR as the IRQ key and, since CPSR contains many other state
   bits, this caused 'z_arch_irq_unlocked' to return false even when
   IRQ is unlocked. This problem is fixed by isolating only the I-bit
   of CPSR and returning this value as the IRQ key, such that it
   returns a non-zero value when interrupt is disabled.

2. The current implementation of 'z_arch_irq_unlock' directly updates
   the value of CPSR control field with the IRQ key and this can cause
   other state bits in CPSR to be corrupted. This problem is fixed by
   conditionally enabling interrupt using CPSIE instruction when the
   value of IRQ key is a zero.

3. The current implementation of 'z_arch_is_in_isr' checks the value
   of CPSR MODE field and returns true if its value is IRQ or FIQ.
   While this does not normally cause an issue, the function can return
   false when IRQ offloading is used because the offload function
   executes in SVC mode. This problem is fixed by adding check for SVC
   mode.

Signed-off-by: Stephanos Ioannidis root@stephanos.io

NOTE:

• Separated out from Cortex-R Port Improvement for 2.2 #19698 for timely review and merging.
• Without the changes in this PR, kernel tests will fail.
• Includes the commits from tests: sleep: Add tick margin definition #22667 (closes tests: sleep: Add tick margin definition #22667).

[stephanosio]

Rebased