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Add acpi device resource enumeration support #62694

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merged 12 commits into from
Jan 31, 2024

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najumon1980
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@najumon1980 najumon1980 commented Sep 15, 2023

Add acpi device resource enumeration interface and updated uart driver with the new acpi interface

@najumon1980 najumon1980 force-pushed the acpi_dev_enum branch 4 times, most recently from 30ccc57 to 53c187b Compare September 18, 2023 05:40
@najumon1980 najumon1980 marked this pull request as ready for review September 18, 2023 07:02
@zephyrbot zephyrbot added platform: X86 x86 and x86-64 area: X86 x86 Architecture (32-bit) area: Devicetree Binding PR modifies or adds a Device Tree binding area: UART Universal Asynchronous Receiver-Transmitter labels Sep 18, 2023
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I haven't looked in details. But took a quick look over the UART driver, and it seems you are replacing PCIe with ACPI in several places. That is not right.

}

#define UART_NS16550_IRQ_CONFIG_PCIE0(n) \
_CONCAT(UART_NS16550_IRQ_CONFIG_ACPI, DT_INST_ON_BUS(n, acpi))(n)
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What if there are no ACPI instances but purely PCIe instances?

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The design change takecare UART instances on both ACPI and PCI or DTS and ACPI at the same time. (For example: UART0 on ACPI node, UART1 on PCI or UART0 on DTS and UART1 on PCI. But doesn't support ACPI and DTS at the same time.

#define UART_NS16550_IRQ_CONFIG_ACPI1(n) \
static void irq_config_func##n(const struct device *dev) \
{ \
}
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Why is this empty for ACPI1?

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For instances on ACPI node, both IRQ and MMIO config as part of init routine. So ACPI irq config is add as stub function.

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updated the code

@najumon1980
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I haven't looked in details. But took a quick look over the UART driver, and it seems you are replacing PCIe with ACPI in several places. That is not right.

The design change takecare UART instances on both ACPI and PCI or DTS and ACPI at the same time. (For example: UART0 on ACPI node, UART1 on PCI or UART0 on DTS and UART1 on PCI. But doesn't support ACPI and DTS at the same time. You can go through existing code and changes to get full picture.

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This is getting overly complicated. Could you find another way of doing this? Might want to use COND_CODE_1() instead of macro trampolines.

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najumon1980 commented Sep 22, 2023

This is getting overly complicated. Could you find another way of doing this? Might want to use COND_CODE_1() instead of macro trampolines.

I totally agree that it will complicate drivers if we need to support on multiple bus topologies and for this I just created a draft PR (WIP): #62993 to abstract such complexity and is given currently just for analyzes purpose.

dts/bindings/acpi/acpi-vbus.yaml Outdated Show resolved Hide resolved
finikorg
finikorg previously approved these changes Jan 29, 2024
dcpleung
dcpleung previously approved these changes Jan 30, 2024
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still an issue in dts side.

# Copyright (c) 2023 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

# Common fields for PCIe devices
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"Common fields for ACPI informed based devices"

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updated

@@ -0,0 +1,23 @@
# Copyright (c) 2023 Intel Corporation
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Rename the file to acpi.yaml

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updated

add device resource enumaration support such as irq and mmio.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
add acpi pnp/hw id for pcie node to enable support for retreive
interrupt routing information for pci legacy interrupt via acpi

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
update prt retrieve based on acpi pnp id instead of acpi device
path/name

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
add resource enumeration and acpi method shell commands such as
retrieve mmio and interrupt resources.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
add acpi hid support for mc146818 yaml file. Currently this added
for acpi test case support.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
remove pci bus compatible id dependency from qemu platforms overlay
files for disk and ivshmem test apps. This already provided as part of
respecitve board dts files and hence no need to duplicate here.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
update acpi test cases with device enumeration, mmio and irq
resources enumeration.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
rename intel,pcie compatible id referance to pcie-controller in
header file comments and rst files

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
add fake x86 acpi function and config macros for acpi unit test

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
@carlescufi carlescufi merged commit 62b2af7 into zephyrproject-rtos:main Jan 31, 2024
35 checks passed
golowanow added a commit to golowanow/zephyr that referenced this pull request Feb 9, 2024
Align with changes at `boards/x86/intel_adl` done by zephyrproject-rtos#62694
and zephyrproject-rtos#67452 while the `up_squared_pro_700` board was in migration
to HWMv2 at `collab-hwm' branch.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
nordicjm pushed a commit that referenced this pull request Feb 12, 2024
Align with changes at `boards/x86/intel_adl` done by #62694
and #67452 while the `up_squared_pro_700` board was in migration
to HWMv2 at `collab-hwm' branch.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
nordicjm pushed a commit to nordicjm/zephyr that referenced this pull request Feb 12, 2024
Align with changes at `boards/x86/intel_adl` done by zephyrproject-rtos#62694
and zephyrproject-rtos#67452 while the `up_squared_pro_700` board was in migration
to HWMv2 at `collab-hwm' branch.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
nordicjm pushed a commit that referenced this pull request Feb 23, 2024
Align with changes at `boards/x86/intel_adl` done by #62694
and #67452 while the `up_squared_pro_700` board was in migration
to HWMv2 at `collab-hwm' branch.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
nordicjm pushed a commit that referenced this pull request Mar 1, 2024
Align with changes at `boards/x86/intel_adl` done by #62694
and #67452 while the `up_squared_pro_700` board was in migration
to HWMv2 at `collab-hwm' branch.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
xingrz pushed a commit to xingrz/zephyr that referenced this pull request Mar 1, 2024
Align with changes at `boards/x86/intel_adl` done by zephyrproject-rtos#62694
and zephyrproject-rtos#67452 while the `up_squared_pro_700` board was in migration
to HWMv2 at `collab-hwm' branch.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
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Labels
area: ACPI ACPI support area: Architectures area: Devicetree Binding PR modifies or adds a Device Tree binding area: PCI Peripheral Component Interconnect area: UART Universal Asynchronous Receiver-Transmitter area: X86 x86 Architecture (32-bit) manifest manifest-acpica platform: X86 x86 and x86-64
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7 participants