musca_a1_wip #7645
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musca_a1_wip #7645
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The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
ARM's Cortex-M Prototyping System (MPS2) is a board with an FPGA that can be programmed with different 'SoCs'. To use these in Zephyr we need a set of board files for each variant. This adds a board for a variant which implements a Cortex-M33 CPU; the naming of this matches that used for the Zephyr SoC (which is itself based on ARM's documentation nomenclature). Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds a lot of hacks for getting non-secure execution in place for ARM v8m. This requires using the gcc 7-2017-q4 major compiler. Signed-off-by: Andy Gross <andy.gross@linaro.org>
Codecov Report
@@ Coverage Diff @@
## master #7645 +/- ##
=======================================
Coverage 55.31% 55.31%
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Files 470 470
Lines 51936 51936
Branches 9927 9927
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Hits 28726 28726
+ Misses 19285 19284 -1
- Partials 3925 3926 +1
Continue to review full report at Codecov.
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I will enable tfm plus zephyr on musca a1 board.