drivers: i2s: add sai support for stm32u5xx

[mariopaja]

Development status:

Board used:
B-U585I-IOT02A
Nucleo-U575

Tests (16-bit, 2-channels, 44.1KHz):

• TX (Nucleo U575) : drivers: i2s: add sai support for stm32u5xx #82945 (comment)
• TX (B-U585I-IOT02A) - RXTX (Nucleo U575): drivers: i2s: add sai support for stm32u5xx #82945 (comment)

Overlays:
nucleo_u575zi_q.overlay

/ {
	aliases {
		sai1a = &sai1_a;
		sai1b = &sai1_b;
	};

	soc {
		pinctrl: pin-controller@42020000 {
			/* SAI1_A */
			/omit-if-no-ref/ sai1_mclk_a_pe2: sai1_mclk_a_pe2 {
				pinmux = <STM32_PINMUX('E', 2, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_sd_a_pe6: sai1_sd_a_pe6 {
				pinmux = <STM32_PINMUX('E', 6, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_fs_a_pe4: sai1_fs_a_pe4 {
				pinmux = <STM32_PINMUX('E', 4, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_sck_a_pe5: sai1_sck_a_pe5 {
				pinmux = <STM32_PINMUX('E', 5, AF13)>;
				slew-rate = "very-high-speed";
			};

			/* SAI1_B */
			/omit-if-no-ref/ sai1_sd_b_pe3: sai1_sd_b_pe3 {
				pinmux = <STM32_PINMUX('E', 3, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_sck_b_pf8: sai1_sck_b_pf8 {
				pinmux = <STM32_PINMUX('F', 8, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_fs_b_pf9: sai1_fs_b_pf9 {
				pinmux = <STM32_PINMUX('F', 9, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_mclk_b_pf7: sai1_mclk_b_pf7 {
				pinmux = <STM32_PINMUX('F', 7, AF13)>;
				slew-rate = "very-high-speed";
			};
		};
	};
};

&sai1_a {
	pinctrl-0 = <&sai1_mclk_a_pe2 &sai1_sd_a_pe6
	&sai1_fs_a_pe4 &sai1_sck_a_pe5>;
	pinctrl-names = "default";
	status = "okay";
	dmas = <&gpdma1 1 36 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS)>;
	dma-names = "tx";
	mclk-enable;
	mclk-div-enable;
};

&sai1_b {
	pinctrl-0 = <&sai1_sd_b_pe3 &sai1_sck_b_pf8 &sai1_fs_b_pf9 &sai1_mclk_b_pf7>;
	pinctrl-names = "default";
	status = "disabled";
	dmas = <&gpdma1 0 37 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS)>;
	dma-names = "tx";
};

&gpdma1 {
	status = "okay";
};

&pll2 {
	/* 44.1KHz (-0.03% Error) */
	div-m = <1>;
	mul-n = <79>;
	div-q = <2>;
	div-r = <2>;
	div-p = <7>;
	clocks = <&clk_msis>;
	status = "okay";
};

&dac1 {
	status = "disabled";
};

b_u585i_iot02a.overlay

/ {
	aliases {
		sai1a = &sai1_a;
	};

	soc {
		pinctrl: pin-controller@42020000 {
			/omit-if-no-ref/ sai1_mclk_a_pe2: sai1_mclk_a_pe2 {
				pinmux = <STM32_PINMUX('E', 2, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_sd_a_pe6: sai1_sd_a_pe6 {
				pinmux = <STM32_PINMUX('E', 6, AF13)>;
			};
			/omit-if-no-ref/ sai1_fs_a_pe4: sai1_fs_a_pe4 {
				pinmux = <STM32_PINMUX('E', 4, AF13)>;
			};
			/omit-if-no-ref/ sai1_sck_a_pe5: sai1_sck_a_pe5 {
				pinmux = <STM32_PINMUX('E', 5, AF13)>;
				slew-rate = "very-high-speed";
			};
		};

		sai1_a: sai1_a@40015404 {
			compatible = "st,stm32-sai";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40015404 0x20>;
			clocks = <&rcc STM32_CLOCK(APB2, 21U)>,
			         <&rcc STM32_SRC_PLL1_P SAI1_SEL(2)>;
			status = "disabled";
		};

	};

};

&sai1_a {
	pinctrl-0 = <&sai1_mclk_a_pe2 &sai1_sd_a_pe6
	&sai1_fs_a_pe4 &sai1_sck_a_pe5>;
	pinctrl-names = "default";
	status = "okay";
	dmas = <&gpdma1 1 36 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS)>;
	dma-names = "tx";
	mclk-enable;
	mclk-div-enable;
};

&gpdma1 {
	status = "okay";
};

&pll2 {
	/* 44.1KHz (-0.03% Error) */
	div-m = <1>;
	mul-n = <79>;
	div-q = <2>;
	div-r = <2>;
	div-p = <7>;
	clocks = <&clk_msis>;
	status = "okay";
};

[erwango]

I didn't go into details but this is a great work. I have few initial comments but the main request would be to add a way to build and use this driver in tree (add a (simple) sample if missing or a board configuration to make use of existing sample)

[erwango]

Is this really U5 specific ?

[mariopaja]

@erwango I dont think so, but since I have build the driver around U5 and havent checked other platforms at all I wanted to specify where I got this

[erwango]

Let's remove. This will be soon obsolete and don't add anything.

[mariopaja]

I didn't go into details but this is a great work. I have few initial comments but the main request would be to add a way to build and use this driver in tree (add a (simple) sample if missing or a board configuration to make use of existing sample)

@erwango An overlay of Nucleo U575 is added to samples/i2s/output

[erwango]

Let's remove. This will be soon obsolete and don't add anything.

[erwango]

Thanks for your feedback. Last round of comments I hope from my part.

[erwango]

Otherwise LGTM

[sonarqubecloud]

Quality Gate passed

Issues
3 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

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