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Removed CPU0 from MCXW72 devices as only one CPU should be targeted. #95684
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Removed CPU0 from MCXW72 devices as only one CPU should be targeted. #95684
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need to squash the commits to be bisectable
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Is there no need to have a possibility to build/flash for the second core? |
This nbu core is only meant to be running signed NXP radio firmwares, adding soc kconfigs like this about a "cpu1" (or an implication by calling the user programmable core "cpu0") to zephyr was an accident. |
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@EmilioCBen , please resolve the merge conflict |
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Depends on #91869 Due to DMA Cells needed in LPUART Nodes for uart_async_api test to pass twister. |
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you don't need to put DNM because of a CI fail, it already cant merge if CI fails. |
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I put it for context and as an extra precaution for the PR not to be merged. Plus to maybe save some people time who are reviewing PRs. |
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PR #96308 will fix CI issue |
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@EmilioCBen I think you need to rebase to get latest main fixes for CI |
Removing cpu0 reference from mcxw72 target as only cpu0 should be targeted on this device. Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
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Removed CPU0 from MCXW72 devices as only one CPU should be targeted.