Skip to content

Conversation

@etienne-lms
Copy link
Contributor

@etienne-lms etienne-lms commented Oct 24, 2025

Correct the Zephyr RAM and flash sizes defined in ST boards YAML files to help twister with these boards constraints.

Fix several RAM size that are wrong regarding what is defined in the
related board device tree.

In many cases, SoC DTSI files have been changed to split internal RAMs
and related boards YAML file was not updated accordingly. This is the
case of H5xx, H7xx

In the case of stm32g081b_eval, polarity bytes are not default enabled
hence the internal SRAM size of 36kB, not 32kB.

Stm32mp135f was wrongly set with 256KB RAM and Flash whereas the board
assigns 256MB for each.

Stm32mp157c_dk2 assigned SRAM1, SRAM2 and SRAM3 to Zephyr hence
providing 320kB of system RAM.

Fix several typos setting RAM size to 786 whereas 768 is expected.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add system flash size and/or RAM size tags in ST boards YAML files
where the information is missing.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
@sonarqubecloud
Copy link

- usart
- tsc
ram: 40
ram: 32
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

The two SRAMs are split in distinct node in DTSI but they are contiguous. Maybe DT needs a revision (out of PR scope)

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Ok, i'll propose something in a dedicated P-R.

- zephyr
sysbuild: true
ram: 640
ram: 256
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Ditto here.

@mathieuchopstm
Copy link
Contributor

FYI @etienne-lms:

Pull request is description is empty.
This workflow fails so that the pull request cannot be merged.

@etienne-lms
Copy link
Contributor Author

Ok, i'll fill it.

@mathieuchopstm mathieuchopstm added this to the v4.3.0 milestone Oct 30, 2025
@etienne-lms
Copy link
Contributor Author

Review comments addressed.
@djiatsaf-st, are the changes fine to you?

@mathieuchopstm
Copy link
Contributor

Adding @FRASTM as assignee since @erwango is out of office and can't approve

@cfriedt cfriedt merged commit 91b9c3a into zephyrproject-rtos:main Oct 31, 2025
27 of 28 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Projects

None yet

Development

Successfully merging this pull request may close these issues.

7 participants