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This is a miss from:
abeccfe xtensa: support for more than 32 interrupts

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@dcpleung dcpleung left a comment

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Hm... compliance didn't catch this, but we usually add space around operators.

This is a miss from:
abeccfe xtensa: support for more than 32 interrupts

Signed-off-by: William Tambe <williamt@cadence.com>
@williamtcdns williamtcdns force-pushed the xtensa_fix_irq_number_computation branch from 022b0ef to 647b76c Compare October 28, 2025 21:15
@williamtcdns
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Hm... compliance didn't catch this, but we usually add space around operators.

Understood. Resolved.

@sonarqubecloud
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@nashif nashif added this to the v4.3.0 milestone Oct 28, 2025
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4 participants