PCIe initialization

src/include/cpu/power/istep_10.h

@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef CPU_PPC64_ISTEP10_H
+#define CPU_PPC64_ISTEP10_H
+
+#include <stdint.h>
+
+void istep_10_10(uint8_t *phb_active_mask, uint8_t *iovalid_enable);
+void istep_10_12(void);
+
+#endif /* CPU_PPC64_ISTEP10_H */

src/include/cpu/power/istep_14.h

@@ -1,38 +1,11 @@
-#ifndef ISTEP_14_H
-#define ISTEP_14_H
+/* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <cpu/power/scom.h>
+#ifndef CPU_PPC64_ISTEP14_H
+#define CPU_PPC64_ISTEP14_H
 
-#define PEC_PBCQHWCFG_REG (0x4010C00)
-#define PEC_NESTTRC_REG (0x4010C03)
-#define P9N2_PEC_ADDREXTMASK_REG (0x4010C05)
-#define MCS_MCMODE0 (0x5010811)
-#define MCS_MCSYNC (0x5010815)
-#define MCA_MBA_FARB3Q (0x7010916)
-#define PEC_PBAIBHWCFG_REG (0xD010800)
-
-#define MCS_MCSYNC_SYNC_GO_CH0 (16)
-#define SUPER_SYNC_BIT (14)
-#define MBA_REFRESH_SYNC_BIT (8)
-#define MCS_MCMODE0_DISABLE_MC_SYNC (27)
-#define MCS_MCMODE0_DISABLE_MC_PAIR_SYNC (28)
-#define PEC_PBAIBHWCFG_REG_PE_PCIE_CLK_TRACE_EN (30)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_OOO_MODE (0x16)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_WR_SCOPE_GROUP (42)
-#define PEC_PBCQHWCFG_REG_PE_CHANNEL_STREAMING_EN (33)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_WR_VG (41)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_INTWR_VG (43)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_INTWR_SCOPE_GROUP (44)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_RD_SCOPE_GROUP (51)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_RD_VG (54)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_TCE_SCOPE_GROUP (56)
-#define PEC_PBCQHWCFG_REG_PE_DISABLE_TCE_VG (59)
-
-#define PEC_PER_PROC (3)
-static const chiplet_id_t pec_ids[PEC_PER_PROC] = {
- PCI0_CHIPLET_ID, PCI1_CHIPLET_ID, PCI2_CHIPLET_ID,
-};
+#include <stdint.h>
 
 void istep_14_2(void);
-void istep_14_3(void);
-#endif
+void istep_14_3(uint8_t phb_active_mask, const uint8_t *iovalid_enable);
+
+#endif /* CPU_PPC64_ISTEP14_H */

src/soc/ibm/power9/Makefile.inc

@@ -9,6 +9,8 @@ romstage-y += romstage.c
 romstage-y += mvpd.c
 romstage-y += vpd.c
 romstage-y += powerbus.c
+romstage-y += istep_10_10.c
+romstage-y += istep_10_12.c
 romstage-y += istep_10_13.c
 romstage-y += istep_13_2.c
 romstage-y += istep_13_3.c

src/soc/ibm/power9/chip.c

@@ -13,7 +13,6 @@
 #include "homer.h"
 #include "istep_13_scom.h"
 #include "chip.h"
-#include "homer.h"
 
 /*
  * These are various definitions of the page sizes and segment sizes supported