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[FMV][AArch64] Remove features which expose non exploitable runtime behavior. #355

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merged 1 commit into from
Nov 6, 2024

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labrinea
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@labrinea labrinea commented Oct 29, 2024

Feature rpres allows an increase in the precision of the single-precision
floating-point reciprocal estimate and reciprocal square root estimate
from an 8-bit mantissa to a 12-bit mantissa depending on the value FPCR.AH
of the Floating-point Control Register.

Similarly, ebf16 allows existing floating-point instructions (BFDOT, BFMMLA,
BFMOPA, BFMOPS, and BFVDOT) to change numeric behaviour depending on the
value FPCR.EBF of the Floating-point Control Register.

Feature memtag3 allows Tag Check Faults to change behaviour depending on
the value SCTLR_ELx.{TCF, TCF0} of the System Control Register.

The runtime detection in FMV does not examine the content of control
registers, therefore runtime dispatch cannot be based on that. One may
argue there is value in altering the control register from a version,
for example "msr dit, #1" if the feature is available on hardware. The
registers FPCR and SCTLR_ELx can be accessed in the absence of rpres,
ebf16, and memtag3, making it hard to justify adding them to the compiler.


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@labrinea
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@andrewcarlotti @DanielKristofKiss @tmatheson-arm @Wilco1

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LGTM

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The same justification applies to dit - the behaviour is determined by a control bit, and the architecture feature merely allows this bit to be switched on.

@labrinea labrinea force-pushed the fmv-remove-runtime-features branch from 49c5c13 to 5d316ea Compare October 30, 2024 15:23
@labrinea
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Added feature dit to this list with justification.

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Wilco1 commented Oct 30, 2024

Looks good to me.

labrinea added a commit to labrinea/llvm-project that referenced this pull request Oct 31, 2024
…ehavior.

Features dit, ebf16, memtag3, and rpres allow existing instructions to behave
differently depending on the value of certain control registers. FMV does
not read the content of control registers making these features unsuitable
for runtime dispatch. See the ACLE patch for more info:

ARM-software/acle#355
labrinea added a commit to labrinea/llvm-test-suite that referenced this pull request Oct 31, 2024
…ehavior.

Feature dit provides independent timing for data processing instructions
according to the value CPSR.DIT of the Current Program Status Register.

The runtime detection in FMV does not examine the content of control
registers, therefore such features are not suitable for runtime dispatch
since they cannot be exploited in a meaningful way. See the ACLE patch
for more info: ARM-software/acle#355

Depends on llvm/llvm-project#114387
@jroelofs
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I don't agree with the justification for removal of dit: you still need the ISA feature presence check around msr dit, x0 instructions that toggle the feature, and prior to this change, FMV could be used for that.

@labrinea
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I don't agree with the justification for removal of dit: you still need the ISA feature presence check around msr dit, x0 instructions that toggle the feature, and prior to this change, FMV could be used for that.

I kinda see your point, but the value of CPSR.DIT cannot be detected at runtime in order to choose a function version based on that. Even if it was the case I still can't think of a meaningful example. Perhaps something like the following snippet?

__attribute__((target_version("dit"))) bool enableDIT(void) { asm volatile ("msr dit, x0"); return true; }
__attribute__((ttarget_version("default"))) bool enableDIT(void) { return false; }

if (enableDIT())
  // do something
else
  // do something else

I am not sure what kind of decisions can be made in the if-else logic based on this.

@jroelofs
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jroelofs commented Oct 31, 2024

I feel this should be sufficient justification to keep it:

__attribute__((target_version("dit"))) void enableDITIfExists(void) { asm volatile ("msr dit, #1"); }
__attribute__((target_version("default"))) void enableDITIfExists(void) { }

@jroelofs
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This solves a very real problem, by the way: https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms#Enable-DIT-for-constant-time-cryptographic-operations

@jroelofs
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I don't agree with the justification for removal of dit: you still need the ISA feature presence check around msr dit, x0 instructions that toggle the feature, and prior to this change, FMV could be used for that.

I kinda see your point, but the value of CPSR.DIT cannot be detected at runtime in order to choose a function version based on that

By "ISA feature presence check" I mean whether or not the cpu supports DIT at all, not runtime detection of whether or not DIT is enabled. Those two axes are almost orthogonal, but FMV is only useful for the former, so I agree that it is not useful for the latter.

…ehavior.

Feature `rpres` allows an increase in the precision of the single-precision
floating-point reciprocal estimate and reciprocal square root estimate
from an 8-bit mantissa to a 12-bit mantissa depending on the value FPCR.AH
of the Floating-point Control Register.

Similarly, `ebf16` allows existing floating-point instructions (BFDOT, BFMMLA,
BFMOPA, BFMOPS, and BFVDOT) to change numeric behaviour depending on the
value FPCR.EBF of the Floating-point Control Register.

Feature `memtag3` allows Tag Check Faults to change behaviour depending on
the value SCTLR_ELx.{TCF, TCF0} of the System Control Register.

The runtime detection in FMV does not examine the content of control
registers, therefore runtime dispatch cannot be based on that. One may
argue there is value in altering the control register from a version,
for example "msr dit, ARM-software#1" if the feature is available on hardware. The
registers FPCR and SCTLR_ELx can be accessed in the absence of rpres,
ebf16, and memtag3, making it hard to justify adding them to the compiler.
@labrinea labrinea force-pushed the fmv-remove-runtime-features branch from 5d316ea to c0c6d7b Compare November 4, 2024 10:13
@vhscampos
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Thanks. Merging now

@vhscampos vhscampos merged commit a897926 into ARM-software:main Nov 6, 2024
3 of 4 checks passed
@labrinea labrinea deleted the fmv-remove-runtime-features branch November 6, 2024 10:10
labrinea added a commit to llvm/llvm-project that referenced this pull request Nov 7, 2024
…ehavior. (#114387)

Features ebf16, memtag3, and rpres allow existing instructions to behave
differently depending on the value of certain control registers. FMV
does not read the content of control registers making these features
unsuitable for runtime dispatch. See the ACLE patch for more info:
ARM-software/acle#355
Groverkss pushed a commit to iree-org/llvm-project that referenced this pull request Nov 15, 2024
…ehavior. (llvm#114387)

Features ebf16, memtag3, and rpres allow existing instructions to behave
differently depending on the value of certain control registers. FMV
does not read the content of control registers making these features
unsuitable for runtime dispatch. See the ACLE patch for more info:
ARM-software/acle#355
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5 participants