[morello] Add Morello ACLE specification. #1
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March 10, 2021 21:40
Sources of the document `Morello Supplement to the Arm C Language Extensions`, originally published at https://developer.arm.com/documentation/102273/latest. The original rST sources have gone through minor editorial tweaks to render correctly on github and to create a PDF version via the tool `rst2pdf`.
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Requesting review to @sbaranga-arm . I have to figure out why I cannot do this simply by adding the username to the reviewers list... |
labrinea
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Nov 4, 2024
…ehavior.
Feature `rpres` allows an increase in the precision of the single-precision
floating-point reciprocal estimate and reciprocal square root estimate
from an 8-bit mantissa to a 12-bit mantissa depending on the value FPCR.AH
of the Floating-point Control Register.
Similarly, `ebf16` allows existing floating-point instructions (BFDOT, BFMMLA,
BFMOPA, BFMOPS, and BFVDOT) to change numeric behaviour depending on the
value FPCR.EBF of the Floating-point Control Register.
Feature `memtag3` allows Tag Check Faults to change behaviour depending on
the value SCTLR_ELx.{TCF, TCF0} of the System Control Register.
The runtime detection in FMV does not examine the content of control
registers, therefore runtime dispatch cannot be based on that. One may
argue there is value in altering the control register from a version,
for example "msr dit, ARM-software#1" if the feature is available on hardware. The
registers FPCR and SCTLR_ELx can be accessed in the absence of rpres,
ebf16, and memtag3, making it hard to justify adding them to the compiler.
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vhscampos
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Nov 6, 2024
…ehavior. (#355) Feature `rpres` allows an increase in the precision of the single-precision floating-point reciprocal estimate and reciprocal square root estimate from an 8-bit mantissa to a 12-bit mantissa depending on the value FPCR.AH of the Floating-point Control Register. Similarly, `ebf16` allows existing floating-point instructions (BFDOT, BFMMLA, BFMOPA, BFMOPS, and BFVDOT) to change numeric behaviour depending on the value FPCR.EBF of the Floating-point Control Register. Feature `memtag3` allows Tag Check Faults to change behaviour depending on the value SCTLR_ELx.{TCF, TCF0} of the System Control Register. The runtime detection in FMV does not examine the content of control registers, therefore runtime dispatch cannot be based on that. One may argue there is value in altering the control register from a version, for example "msr dit, \#1" if the feature is available on hardware. The registers FPCR and SCTLR_ELx can be accessed in the absence of rpres, ebf16, and memtag3, making it hard to justify adding them to the compiler.
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Sources of the document
Morello Supplement to the Arm C Language Extensions, originally published athttps://developer.arm.com/documentation/102273/latest.
The original rST sources have gone through minor editorial tweaks to
render correctly on github and to create a PDF version via the tool
rst2pdf.