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Remove GPIO pin-maps used for FPGA testing #12436

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merged 7 commits into from
Mar 4, 2020

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@mprse mprse commented Feb 14, 2020

Summary of changes

This is the continuation of #12379 (restricting GPIOs in FPGA testing instead of using dummy GPIO pin-maps).

This PR provides the following changes:

  1. Update find_ports() FPGA testing utility function to loop through the form factor pins instead the pin-map.

This change is required to fully remove GPIO pin-maps which were already added for FPGA testing.
One use case of adding GPIO pin-map was that pin-map must have the specific format - must be ended with NC pin. Functions that deal with pin-maps loops through the pin-map until NC pin is encountered.
Also, our FPGA testing utility function to find pins for testing does that. When GPIO pin-maps are fully removed we will have one generic GPIO pinmap which provides Arduino pins: D0, D1, D2, etc. (only Arduino form factor is supported at the moment).
In some cases may happen that an Arduino pin is not connected (e.g. KW24D: D4 == NC). As a result, we will have NC not only at the end but also in the middle of the GPIO pin-map.
In this case, find_ports() function will finish processing pin-map to early (when first NC is encountered).
The proposition is to change the find_ports() FPGA testing utility function to loop through form factor pins (instead pin-map) and then check if the pin is not NC and is available on the specific pin-map before using it for testing.

  1. KW24D, KW41Z, K64F: Remove GPIO pin-maps (use restricted GPIO pins if needed)

  2. Fix include order in the UART FPGA test.


Test results after applying the above changes:

  K64F NUCLEO_F429ZI DISCO_L475VG_IOT01A NUCLEO_F411RE NUCLEO_F303RE LPC55S69 NRF52840_DK
analogin OK OK OK OK OK OK OK
gpio OK OK OK OK OK OK OK
gpio_irq OK OK OK OK OK OK OK
i2c FAIL OK OK OK OK OK FAIL
pwm OK OK OK OK OK OK OK
spi OK OK OK OK OK OK OK
uart OK OK OK OK OK OK OK

We can see that now we have 2 failures while I2C testing: K64F and NRF52840_DK. The method of searching for the pins for testing has changed and now find_ports() function loops through form factor pins (instead of pin map). As a result, different pins than before can be selected to test peripherals.

Two issues which have been found must be addressed before this PR can be merged:

  1. K64F: test fails when D12(PTD3) pin is used as SDA. I checked the reference manual and board schematic, but I didn't find anything special about this pin (b619c29). cc @ARMmbed/team-nxp please help.

  2. NRF52840_DK: By default D0 - D3 pins are used for the bit-banged SPI com channel between mbed target and the FPGA-test-shield. For some reason, if pins were used as GPIOs and then reconfigured to I2C pins the I2C com does not work on NRF52840. I tried to implement gpio_free() function and use it to free GPIOs used for FPGA com channel, but without success. For now, I suggest skipping I2C tests on D0 - D3 pins. (897b4b3).

Impact of changes

Migration actions required

Documentation


Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[X] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Reviewers

@jamesbeyond @0xc0170 @ARMmbed/team-nxp
@maciejbocianski @fkjagodzinski


@0xc0170 0xc0170 changed the title Remove GPIO pin-maps used for FPGA testing - WIP WIP: Remove GPIO pin-maps used for FPGA testing Feb 14, 2020
@mergify mergify bot added the do not merge label Feb 14, 2020
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0xc0170 commented Feb 14, 2020

Rule for "Do not merge" label : add WIP: as prefix to the title. I fixed it the title, should be soon marked as don't merge.

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@mprse, thank you for your changes.
@fkjagodzinski @maclobdell @maciejbocianski @jamesbeyond @0xc0170 @ARMmbed/mbed-os-hal @ARMmbed/mbed-os-test @ARMmbed/mbed-os-maintainers please review.

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mprse commented Feb 17, 2020

cc @mmahadevan108

@mprse mprse force-pushed the fpga_remove_gpio_pinmaps branch from b619c29 to 5e5d0ff Compare February 17, 2020 09:54
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mprse commented Feb 17, 2020

The second issue (I2C test failure on NRF52840_DK) has been fixed here: 3f7609f

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Looks good so far 👍

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mprse commented Feb 20, 2020

ping @mmahadevan108

Comment on lines 20 to 31
// List of GPIOs with limited functionality
const PinList *pinmap_gpio_restricted_pins()
{
return PinMap_GPIO;
static const PinName pins[] = {
PTE24, // fixed pull-up (for I2C)
PTE25, // fixed pull-up (for I2C)
};
static const PinList pin_list = {
sizeof(pins) / sizeof(pins[0]),
pins
};
return &pin_list;
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Note, there is an overlap with PR #12477 (1b894aa#diff-22a0fab58312a8cd5c56864402f4aa94). If #12477 gets merged first, we do not need this implementation of pinmap_gpio_restricted_pins() for K64F any more. The input pull mode tests will be skipped based on pin's capabilities now.

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Thanks for the clarification. In this case, I think #12477 should go first. And then I rebase and update this one.

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@mprse, is this still a WIP?

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mprse commented Feb 24, 2020

@mprse, is this still a WIP?

Removed WIP, but this PR needs #12477. When #12477 is merged I will rebase this one and drop restricted pins for K64F.

@mprse mprse changed the title WIP: Remove GPIO pin-maps used for FPGA testing Remove GPIO pin-maps used for FPGA testing Feb 24, 2020
@mergify mergify bot added the needs: work label Feb 24, 2020
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mergify bot commented Feb 24, 2020

This PR cannot be merged due to conflicts. Please rebase to resolve them.

@mergify mergify bot removed the needs: review label Feb 24, 2020
… form factor pins instead the pin-map

This change is required to fully remove gpio pin-maps which were already added for FPGA testing.
One use case of adding gpio pinmap was that pin-map must have the specific format - must be ended with NC pin. Functions that deal with pin-maps loops through the pin-map until NC pin is encountered.
Also, our FPGA testing utility function to find pins for testing does that. When gpio pinmaps are fully removed we will have one generic gpio pinmap which provides Arduino pins: D0, D1, D2, etc. (only Arduino form factor is supported at the moment).
In some cases may happen that an arduino pin is not connected (e.g. KW24D: D4 == NC). As a result we will have NC not only at the end, but also in the middle of the gpio pin-map.
In this case find_ports() function will finish processing pin-map to early (when first NC is encountered).
The proposition is to change the find_ports() FPGA testing utility function to loop through form factor pins (instead pin-map) and then check if the pin is not NC and is available on the specific pin-map before using it for testing.
By default D0 - D3 pins are used for the bit-banged SPI com channel between mbed target and the FPGA-test-shield.
For some reason, if pins were used as GPIOs and then reconfigured to I2C pins the I2C com does not work on NRF52840.

This commit modifies i2c_configure_twi_instance() function and adds proper initialization of the I2C pins.
@mprse mprse force-pushed the fpga_remove_gpio_pinmaps branch from 5e5d0ff to 32311b7 Compare February 24, 2020 14:26
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mprse commented Feb 24, 2020

Rebased on master after #12477 has been merged and removed restricted pins for K64F.
GPIO test results on K64F results:

| target       | platform_name | test suite                              | result | elapsed_time (sec) | copy_method |
|--------------|---------------|-----------------------------------------|--------|--------------------|-------------|
| K64F-GCC_ARM | K64F          | tests-mbed_hal_fpga_ci_test_shield-gpio | OK     | 25.09              | default     |
mbedgt: test suite results: 1 OK
mbedgt: test case report:
| target       | platform_name | test suite                              | test case             | passed | failed | result | elapsed_time (sec) |
|--------------|---------------|-----------------------------------------|-----------------------|--------|--------|--------|--------------------|
| K64F-GCC_ARM | K64F          | tests-mbed_hal_fpga_ci_test_shield-gpio | basic input & output  | 1      | 0      | OK     | 1.7                |
| K64F-GCC_ARM | K64F          | tests-mbed_hal_fpga_ci_test_shield-gpio | explicit init, input  | 1      | 0      | OK     | 1.82               |
| K64F-GCC_ARM | K64F          | tests-mbed_hal_fpga_ci_test_shield-gpio | explicit init, output | 1      | 0      | OK     | 1.74               |
| K64F-GCC_ARM | K64F          | tests-mbed_hal_fpga_ci_test_shield-gpio | input pull modes      | 1      | 0      | OK     | 1.83               |
mbedgt: test case results: 4 OK

This one is ready for CI.

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0xc0170 commented Feb 24, 2020

CI started

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mbed-ci commented Feb 24, 2020

Test run: SUCCESS

Summary: 11 of 11 test jobs passed
Build number : 1
Build artifacts

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0xc0170 commented Feb 25, 2020

@mprse Is this ready for final reviews? Please let us know who should approve (there are lot of reviewers requested here but not yet completed).

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mprse commented Feb 25, 2020

@mprse Is this ready for final reviews? Please let us know who should approve (there are lot of reviewers requested here but not yet completed).

This one is ready for review.
@mmahadevan108 already accepted this, so I assume that it is ok to remove PTD3 from K64F SDA pin-map. It would be also good to get approval from: @maciejbocianski @jamesbeyond.

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bulislaw commented Mar 3, 2020

@maciejbocianski @jamesbeyond ping

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LGTM

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0xc0170 commented Mar 4, 2020

CI restarted

@mergify mergify bot added needs: CI and removed needs: review labels Mar 4, 2020
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mbed-ci commented Mar 4, 2020

Test run: SUCCESS

Summary: 7 of 7 test jobs passed
Build number : 2
Build artifacts

@0xc0170 0xc0170 merged commit 22f3bc4 into ARMmbed:master Mar 4, 2020
@mergify mergify bot removed the ready for merge label Mar 4, 2020
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