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Remove GPIO pin-maps used for FPGA testing #12436
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Rule for "Do not merge" label : add WIP: as prefix to the title. I fixed it the title, should be soon marked as don't merge. |
@mprse, thank you for your changes. |
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The second issue (I2C test failure on |
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Looks good so far 👍
ping @mmahadevan108 |
// List of GPIOs with limited functionality | ||
const PinList *pinmap_gpio_restricted_pins() | ||
{ | ||
return PinMap_GPIO; | ||
static const PinName pins[] = { | ||
PTE24, // fixed pull-up (for I2C) | ||
PTE25, // fixed pull-up (for I2C) | ||
}; | ||
static const PinList pin_list = { | ||
sizeof(pins) / sizeof(pins[0]), | ||
pins | ||
}; | ||
return &pin_list; |
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Note, there is an overlap with PR #12477 (1b894aa#diff-22a0fab58312a8cd5c56864402f4aa94). If #12477 gets merged first, we do not need this implementation of pinmap_gpio_restricted_pins()
for K64F any more. The input pull mode tests will be skipped based on pin's capabilities now.
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Thanks for the clarification. In this case, I think #12477 should go first. And then I rebase and update this one.
@mprse, is this still a WIP? |
This PR cannot be merged due to conflicts. Please rebase to resolve them. |
… form factor pins instead the pin-map This change is required to fully remove gpio pin-maps which were already added for FPGA testing. One use case of adding gpio pinmap was that pin-map must have the specific format - must be ended with NC pin. Functions that deal with pin-maps loops through the pin-map until NC pin is encountered. Also, our FPGA testing utility function to find pins for testing does that. When gpio pinmaps are fully removed we will have one generic gpio pinmap which provides Arduino pins: D0, D1, D2, etc. (only Arduino form factor is supported at the moment). In some cases may happen that an arduino pin is not connected (e.g. KW24D: D4 == NC). As a result we will have NC not only at the end, but also in the middle of the gpio pin-map. In this case find_ports() function will finish processing pin-map to early (when first NC is encountered). The proposition is to change the find_ports() FPGA testing utility function to loop through form factor pins (instead pin-map) and then check if the pin is not NC and is available on the specific pin-map before using it for testing.
By default D0 - D3 pins are used for the bit-banged SPI com channel between mbed target and the FPGA-test-shield. For some reason, if pins were used as GPIOs and then reconfigured to I2C pins the I2C com does not work on NRF52840. This commit modifies i2c_configure_twi_instance() function and adds proper initialization of the I2C pins.
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Rebased on master after #12477 has been merged and removed restricted pins for
This one is ready for CI. |
CI started |
Test run: SUCCESSSummary: 11 of 11 test jobs passed |
@mprse Is this ready for final reviews? Please let us know who should approve (there are lot of reviewers requested here but not yet completed). |
This one is ready for review. |
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LGTM
CI restarted |
Test run: SUCCESSSummary: 7 of 7 test jobs passed |
Summary of changes
This is the continuation of #12379 (restricting GPIOs in FPGA testing instead of using dummy GPIO pin-maps).
This PR provides the following changes:
find_ports()
FPGA testing utility function to loop through the form factor pins instead the pin-map.This change is required to fully remove GPIO pin-maps which were already added for FPGA testing.
One use case of adding GPIO pin-map was that pin-map must have the specific format - must be ended with
NC
pin. Functions that deal with pin-maps loops through the pin-map untilNC
pin is encountered.Also, our FPGA testing utility function to find pins for testing does that. When GPIO pin-maps are fully removed we will have one generic GPIO pinmap which provides Arduino pins: D0, D1, D2, etc. (only Arduino form factor is supported at the moment).
In some cases may happen that an Arduino pin is not connected (e.g.
KW24D
:D4 == NC
). As a result, we will haveNC
not only at the end but also in the middle of the GPIO pin-map.In this case,
find_ports()
function will finish processing pin-map to early (when firstNC
is encountered).The proposition is to change the
find_ports()
FPGA testing utility function to loop through form factor pins (instead pin-map) and then check if the pin is notNC
and is available on the specific pin-map before using it for testing.KW24D
,KW41Z
,K64F
: Remove GPIO pin-maps (use restricted GPIO pins if needed)Fix include order in the UART FPGA test.
Test results after applying the above changes:
We can see that now we have 2 failures while
I2C
testing:K64F
andNRF52840_DK
. The method of searching for the pins for testing has changed and nowfind_ports()
function loops through form factor pins (instead of pin map). As a result, different pins than before can be selected to test peripherals.Two issues which have been found must be addressed before this PR can be merged:
K64F
: test fails whenD12
(PTD3
) pin is used asSDA
. I checked the reference manual and board schematic, but I didn't find anything special about this pin (b619c29). cc @ARMmbed/team-nxp please help.NRF52840_DK
: By defaultD0
-D3
pins are used for the bit-banged SPI com channel between mbed target and the FPGA-test-shield. For some reason, if pins were used as GPIOs and then reconfigured toI2C
pins theI2C
com does not work onNRF52840
. I tried to implementgpio_free()
function and use it to free GPIOs used for FPGA com channel, but without success. For now, I suggest skipping I2C tests onD0
-D3
pins. (897b4b3).Impact of changes
Migration actions required
Documentation
Pull request type
Test results
Reviewers
@jamesbeyond @0xc0170 @ARMmbed/team-nxp
@maciejbocianski @fkjagodzinski