01. Project and Clocktree

Project

This example starts with a bare metal project. Generating the project using the STM32CubeIDE, but then deleting everything except for the CMSIS, main files and system_stm32g4xx.c, as it contains some callbacks we would have to take care of. Also deleting the .ioc-file with the configuration to prevent it from accidentally generating code and overwriting our changes.

Clocktree

The first thing to configure is the clock tree. The easiest way to configure the clock bare metal is to setup the clock in CubeMX as desired and then manually setting all the registers as the configurator shows. In this case, we have a 25MHz external clock, configuring the system speed to 143MHz and the AHB-Bus to 72MHz. The 48MHz USB-Clock will be driven by the PLL-Clock

static void InitClock() {
    RCC->CR |= RCC_CR_HSEON;

    // Configure PLL (R=143.75, Q=47.92)
    RCC->CR &= ~RCC_CR_PLLON;
    while (RCC->CR & RCC_CR_PLLRDY) {
    }
    RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE | RCC_PLLCFGR_PLLM_0 | (23 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLQ_1;
    RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN | RCC_PLLCFGR_PLLQEN;
    RCC->CR |= RCC_CR_PLLON;

    // Select PLL as main clock, AHB/2
    RCC->CFGR |= RCC_CFGR_HPRE_3 | RCC_CFGR_SW_PLL;

    // Select USB Clock as PLLQ
    RCC->CCIPR = RCC_CCIPR_CLK48SEL_1;

    // Enable IO Clock for USB & Port
    RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN;
    RCC->APB1ENR1 |= RCC_APB1ENR1_USBEN;
}

The AHB clock is only set to 72MHz because it needs time to transition to high speed. If you don't have a transition phase the Bus will fault. Because we don't need those speeds, I leave it at 72MHz.