[RP2040] Fix I2C lockups, improve error handling and performance #329
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Problem: * in edge-case scenarios the tx empty interrupt was still enabled after a transmission was finished. This would lead to endless interrupt tail chaining that completely starved the system. Solution: * all irqs are now disabled at the end of a transaction by default Error handling: * all error condition irqs like over and underruns of tx and rx fifos are now enabled and handled with an wake-up of the sleeping thread plus disabling of all irqs Optimizations: * irq status register is only read once for evalutation in the irq handler * better utilization of the rx fifos during reception, which are now only read if all data has been successfully received.
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fpoussin
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Jul 27, 2022
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Problem
Solution
Error handling
Optimizations
Fixes qmk/qmk_firmware#17720