SiliconCompiler is a modular hardware build system ("make for silicon"). The project philosophy is to "make the complex possible while keeping the simple simple".
The SiliconCompiler project includes:
- An easy to use Python API.
- A standardized JSON schema for job/metric tracking.
- A runtime engine with support for local and remote compilation.
- A command line application ('sc') that enables single line hardware compilation.
- Support for over 30 open source and commercial ASIC and FPGA EDA tools.
SiliconCompiler is available as wheel packages on PyPI for macOS, Windows and Linux platforms. For working Python 3.8-3.12 environment, just use pip.
python -m pip install --upgrade siliconcompilerConverting RTL into DRC clean GDS takes less than 10 lines of simple Python code.
import siliconcompiler # import python package
chip = siliconcompiler.Chip('heartbeat') # create chip object
chip.load_target('skywater130_demo') # load a pre-defined target
chip.input('heartbeat.v') # set input sources
chip.clock('clk', period=10) # set constraints
chip.set('option','remote', True) # enable remote execution
chip.run() # run compilation
chip.summary() # print summary
chip.show() # show layoutSimple designs can be compiled in a single line using the built in command line 'sc' app:
sc -remote -target "asic_demo"- Ease-of-use: Programmable with a simple Python API
- Portability: Powerful dynamic JSON schema supports ASIC and FPGA design and simulation
- Speed: Flowgraph execution model enables cloud scale execution.
- Friction-less: Remote execution model enables "zero install" compilation
- Modularity: Tool abstraction layer makes it easy to add/port new tools to the project.
- Provenance: Compilation manifests created automatically during execution.
- Documented: An extensive set of auto-generated high quality reference documents.
- In-use: Actively used by Zero ASIC for commercial tapeouts at advanced process nodes.
The full reference manual and tutorials can be found HERE.
If you want to cite our work, please use the following paper:
A. Olofsson, W. Ransohoff, N. Moroze, "Invited: A Distributed Approach to Silicon Compilation", 59th Design Automation Conference (DAC), 10-14 July 2022, San Francisco, CA, USA. Published, 7/2022.
Bibtex:
@inproceedings{10.1145/3489517.3530673,
author = {Olofsson, Andreas and Ransohoff, William and Moroze, Noah},
title = {A Distributed Approach to Silicon Compilation: Invited},
year = {2022},
booktitle = {Proceedings of the 59th ACM/IEEE Design Automation Conference},
pages = {1343–1346},
location = {San Francisco, California}
}
| Type | Supported |
|---|---|
| Languages | C, Verilog, SV, VHDL, Chisel, Migen/Amaranth, Bluespec |
| Simulation | Verilator, Icarus, GHDL |
| Synthesis | Yosys, Vivado, Synopsys, Cadence |
| ASIC APR | OpenRoad, Synopsys, Cadence |
| FPGA APR | VPR, nextpnr, Vivado |
| Layout Viewer | Klayout, OpenRoad, Cadence, Synopsys |
| DRC/LVS | Magic, Synopsys, Siemens |
| PDKs | sky130, asap7, freepdk45, gf12lp, gf22fdx, intel16 |
Complete installation instructions are available in the Installation Guide.
To install the project from source (recommended for developers only).
git clone https://github.com/siliconcompiler/siliconcompiler
cd siliconcompiler
python -m pip install -e . # Required install step
python -m pip install -e .[docs,test] # Optional install step for generating docs and running testsInstallation instructions for all external tools can be found in the External Tools section of the user guide. We have included shell setup scripts (Ubuntu) for most of the supported tools. See the ./setup directory for a complete set of scripts and ./setup/_tools.json for the currently recommended tool versions.
SiliconCompiler is an open-source project and welcomes contributions. To find out how to contribute to the project, see our Contributing Guidelines.
We use GitHub Issues for tracking requests and bugs.